[AMD Official Use Only - General] Hi Reinette, > -----Original Message----- > From: Reinette Chatre <reinette.chatre@xxxxxxxxx> > Sent: Friday, September 16, 2022 10:55 AM > To: Moger, Babu <Babu.Moger@xxxxxxx>; corbet@xxxxxxx; > tglx@xxxxxxxxxxxxx; mingo@xxxxxxxxxx; bp@xxxxxxxxx > Cc: fenghua.yu@xxxxxxxxx; dave.hansen@xxxxxxxxxxxxxxx; x86@xxxxxxxxxx; > hpa@xxxxxxxxx; paulmck@xxxxxxxxxx; akpm@xxxxxxxxxxxxxxxxxxxx; > quic_neeraju@xxxxxxxxxxx; rdunlap@xxxxxxxxxxxxx; > damien.lemoal@xxxxxxxxxxxxxxxxxx; songmuchun@xxxxxxxxxxxxx; > peterz@xxxxxxxxxxxxx; jpoimboe@xxxxxxxxxx; pbonzini@xxxxxxxxxx; > chang.seok.bae@xxxxxxxxx; pawan.kumar.gupta@xxxxxxxxxxxxxxx; > jmattson@xxxxxxxxxx; daniel.sneddon@xxxxxxxxxxxxxxx; Das1, Sandipan > <Sandipan.Das@xxxxxxx>; tony.luck@xxxxxxxxx; james.morse@xxxxxxx; > linux-doc@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; > bagasdotme@xxxxxxxxx; eranian@xxxxxxxxxx > Subject: Re: [PATCH v4 05/13] x86/cpufeatures: Add Bandwidth Monitoring > Event Configuration feature flag > > Hi Babu, > > On 9/7/2022 11:00 AM, Babu Moger wrote: > > Newer AMD processors support the new feature Bandwidth Monitoring > > Event Configuration (BMEC). > > > > Support of this feature is available via CPUID Fn8000_0020_EBX_x0 (ECX=0). > > Bits Field Name Description > > 3 EVT_CFG Bandwidth Monitoring Event Configuration (BMEC) > > > > Currently, the bandwidth monitoring events mbm_total_bytes and > > mbm_local_bytes are set to count all the total and local reads/writes > > respectively. With the introduction of SLOW memory, the two counters > > are > > Why is SLOW in caps? Will fix it. > > > not enough to count all the different types of memory events. With the > > feature BMEC, the users have the option to configure mbm_total_bytes > > and mbm_local_bytes to count the specific type of events. > > > > Each BMEC event has a configuration MSR, QOS_EVT_CFG (0x000_0400h + > > EventID) which contains one field for each Bandwidth Type that can be > > used to configure the bandwidth event to track any combination of > > supported bandwidth types. The event will count requests from every > > Bandwidth Type bit that is set in the corresponding configuration register. > > > > Following are the types of events supported: > > > > ==== ======================================================== > > Bits Description > > ==== ======================================================== > > 6 Dirty Victims from the QOS domain to all types of memory > > 5 Reads to slow memory in the non-local NUMA domain > > 4 Reads to slow memory in the local NUMA domain > > 3 Non-temporal writes to non-local NUMA domain > > 2 Non-temporal writes to local NUMA domain > > 1 Reads to memory in the non-local NUMA domain > > 0 Reads to memory in the local NUMA domain > > ==== ======================================================== > > > > By default, the mbm_total_bytes configuration is set to 0x7F to count > > all the event types and the mbm_local_bytes configuration is set to > > 0x15 to count all the local memory events. > > > > Feature description is available in the specification, "AMD64 > > Technology Platform Quality of Service Extensions, Revision: 1.03 > > Publication # 56375 > > Revision: 1.03 Issue Date: February 2022". > > > > Link: > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww. > > amd.com%2Fen%2Fsupport%2Ftech-docs%2Famd64-technology-platform- > quality > > -service- > extensions&data=05%7C01%7Cbabu.moger%40amd.com%7C5ba4a608 > > > edb04202be2708da97fbe2df%7C3dd8961fe4884e608e11a82d994e183d%7C0% > 7C0%7C > > > 637989405343884737%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMD > AiLCJQIjo > > > iV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdat > a=hoyj > > zeINRtp1n%2FWsG0MHxzmQ8aLdDV4V03xlJVsNRv8%3D&reserved=0 > > Link: > > https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz > > > illa.kernel.org%2Fshow_bug.cgi%3Fid%3D206537&data=05%7C01%7Cbab > u.m > > > oger%40amd.com%7C5ba4a608edb04202be2708da97fbe2df%7C3dd8961fe488 > 4e608e > > > 11a82d994e183d%7C0%7C0%7C637989405343884737%7CUnknown%7CTWFpb > GZsb3d8ey > > > JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7 > C300 > > > 0%7C%7C%7C&sdata=n0gR1mooP9QuEzhrvXrvPaateof4XrBABrAoK5N8e8 > o%3D&am > > p;reserved=0 > > Signed-off-by: Babu Moger <babu.moger@xxxxxxx> > > Reviewed-by: Ingo Molnar <mingo@xxxxxxxxxx> > > --- > > arch/x86/include/asm/cpufeatures.h | 1 + > > arch/x86/kernel/cpu/scattered.c | 1 + > > 2 files changed, 2 insertions(+) > > > > diff --git a/arch/x86/include/asm/cpufeatures.h > > b/arch/x86/include/asm/cpufeatures.h > > index 1815435c9c88..a4ee02a56d54 100644 > > --- a/arch/x86/include/asm/cpufeatures.h > > +++ b/arch/x86/include/asm/cpufeatures.h > > @@ -305,6 +305,7 @@ > > #define X86_FEATURE_USE_IBPB_FW (11*32+16) /* "" Use IBPB > during runtime firmware calls */ > > #define X86_FEATURE_RSB_VMEXIT_LITE (11*32+17) /* "" Fill RSB on > VM exit when EIBRS is enabled */ > > #define X86_FEATURE_SMBA (11*32+18) /* SLOW Memory > Bandwidth Allocation */ > > +#define X86_FEATURE_BMEC (11*32+18) /* AMD > Bandwidth Monitoring Event Configuration (BMEC) */ > > (numbering issue has already been discussed) Yes. > > > > > /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ > > #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI > instructions */ > > diff --git a/arch/x86/kernel/cpu/scattered.c > > b/arch/x86/kernel/cpu/scattered.c index 885ecf46abb2..7981df0b910e > > 100644 > > --- a/arch/x86/kernel/cpu/scattered.c > > +++ b/arch/x86/kernel/cpu/scattered.c > > @@ -45,6 +45,7 @@ static const struct cpuid_bit cpuid_bits[] = { > > { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, > > { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, > > { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, > > + { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 }, > > { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, > > { 0, 0, 0, 0, 0 } > > }; > > > > > > Similar to previous - please use same coding style as area being changed. Sure. > > Is there a feature dependency (cpuid_deps[]) on X86_FEATURE_CQM_LLC > needed? Good catch.. Yes. Its needed. Will fix it. Thanks Babu
