Hi Babu, On 8/22/2022 6:43 AM, Babu Moger wrote: > diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c > index 6c38427b71a2..36ad97ab7342 100644 > --- a/arch/x86/kernel/cpu/resctrl/core.c > +++ b/arch/x86/kernel/cpu/resctrl/core.c > @@ -253,6 +253,37 @@ static bool __rdt_get_mem_config_amd(struct rdt_resource *r) > return true; > } > > +static bool __rdt_get_s_mem_config_amd(struct rdt_resource *r) > +{ > + struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r); > + union cpuid_0x10_3_eax eax; > + union cpuid_0x10_x_edx edx; > + u32 ebx, ecx; > + > + cpuid_count(0x80000020, 2, &eax.full, &ebx, &ecx, &edx.full); > + hw_res->num_closid = edx.split.cos_max + 1; > + r->default_ctrl = MAX_MBA_BW_AMD; > + > + /* AMD does not use delay */ > + r->membw.delay_linear = false; > + r->membw.arch_needs_linear = false; > + > + /* > + * AMD does not use memory delay throttle model to control > + * the allocation like Intel does. > + */ > + r->membw.throttle_mode = THREAD_THROTTLE_UNDEFINED; > + r->membw.min_bw = 0; > + r->membw.bw_gran = 1; > + /* Max value is 2048, Data width should be 4 in decimal */ > + r->data_width = 4; > + > + r->alloc_capable = true; > + r->alloc_enabled = true; > + > + return true; > +} > + >From what I can tell this new function is almost identical to (it differs with one character from) __rdt_get_mem_config_amd(). Could it be refactored to avoid such duplication? Reinette