On 15/07/22 14:03, Daniil Lunev wrote: > UFS storage devices require bRefClkFreq attribute to be set to operate > correctly at high speed mode. The necessary value is determined by what the > SoC / board supports. The standard doesn't specify a method to query the > value, so the information needs to be fed in separately. > > DT information feeds into setting up the clock framework, so platforms > using DT can get the UFS reference clock frequency from the clock > framework. A special node "ref_clk" from the clock array for the UFS > controller node is used as the source for the information. > > On the platforms that do not use DT (e.g. Intel), the alternative mechanism > to feed the intended reference clock frequency is necessary. Specifying the > necessary information in DSD of the UFS controller ACPI node is an > alternative mechanism proposed in this patch. Those can be accessed via > firmware property facility in the kernel and in many ways simillar to > querying properties defined in DT. > > This patch introduces a small helper function to query a predetermined ACPI > supplied property of the UFS controller, and uses it to attempt retrieving > reference clock value, unless that was already done by the clock > infrastructure. > > Signed-off-by: Daniil Lunev <dlunev@xxxxxxxxxxxx> Reviewed-by: Adrian Hunter <adrian.hunter@xxxxxxxxx> > > --- > > Documentation/scsi/ufs.rst | 15 +++++++++++++++ > drivers/ufs/core/ufshcd.c | 16 ++++++++++++++++ > 2 files changed, 31 insertions(+) > > diff --git a/Documentation/scsi/ufs.rst b/Documentation/scsi/ufs.rst > index fbac745b783ce..885b1a736e3f3 100644 > --- a/Documentation/scsi/ufs.rst > +++ b/Documentation/scsi/ufs.rst > @@ -17,6 +17,8 @@ Universal Flash Storage > 3.2 UTP Transfer requests > 3.3 UFS error handling > 3.4 SCSI Error handling > + 4. BSG Support > + 5. UFS Reference Clock Frequency configuration > > > 1. Overview > @@ -193,3 +195,16 @@ UFS specifications can be found at: > > - UFS - http://www.jedec.org/sites/default/files/docs/JESD220.pdf > - UFSHCI - http://www.jedec.org/sites/default/files/docs/JESD223.pdf > + > +5. UFS Reference Clock Frequency configuration > +============================================== > + > +Devicetree can define a clock named "ref_clk" under the UFS controller node > +to specify the intended reference clock frequency for the UFS storage > +parts. ACPI-based system can specify the frequency using ACPI > +Device-Specific Data property named "ref-clk-freq". In both ways the value > +is interpreted as frequency in Hz and must match one of the values given in > +the UFS specification. UFS subsystem will attempt to read the value when > +executing common controller initialization. If the value is available, UFS > +subsytem will ensure the bRefClkFreq attribute of the UFS storage device is > +set accordingly and will modify it if there is a mismatch. > diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c > index ce86d1b790c05..78242f189f636 100644 > --- a/drivers/ufs/core/ufshcd.c > +++ b/drivers/ufs/core/ufshcd.c > @@ -8536,6 +8536,19 @@ static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on) > return ret; > } > > +static enum ufs_ref_clk_freq ufshcd_parse_ref_clk_property(struct ufs_hba *hba) > +{ > + u32 freq; > + int ret = device_property_read_u32(hba->dev, "ref-clk-freq", &freq); > + > + if (ret) { > + dev_dbg(hba->dev, "Cannnot query 'ref-clk-freq' property = %d", ret); > + return REF_CLK_FREQ_INVAL; > + } > + > + return ufs_get_bref_clk_from_hz(freq); > +} > + > static int ufshcd_init_clocks(struct ufs_hba *hba) > { > int ret = 0; > @@ -8629,6 +8642,9 @@ static int ufshcd_hba_init(struct ufs_hba *hba) > if (err) > goto out_disable_hba_vreg; > > + if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL) > + hba->dev_ref_clk_freq = ufshcd_parse_ref_clk_property(hba); > + > err = ufshcd_setup_clocks(hba, true); > if (err) > goto out_disable_hba_vreg;
