Hi all,
On Fri, Jun 17, 2022 at 07:49:22PM +0800, WANG Xuerui wrote:
> On 2022/6/17 19:05, Huacai Chen wrote:
> > Hi, Yanteng,
> >
> > On Fri, Jun 17, 2022 at 6:55 PM Yanteng Si <siyanteng@xxxxxxxxxxx> wrote:
> > > "Note" is an admonition, but it doesn't render
> > > correctly, let's fix it by using reST directives.
> > I think "but it doesn't render correctly" should be "but it isn't
> > correctly rendered in HTML". How do you think, Xuerui?
> This depends on what you mean by "correctly"; actually the original
> rendering is readable, only that it's not rendered with a "note" block.
> Maybe just "Notes are better expressed with reST admonitions."?
Agree with Xuerui.
> >
> > Huacai
> > > Fixes: 0ea8ce61cb2c ("Documentation: LoongArch: Add basic documentations")
> > > Signed-off-by: Yanteng Si <siyanteng@xxxxxxxxxxx>
> > > Reviewed-by: WANG Xuerui <git@xxxxxxxxxx>
> > > ---
> > > Documentation/loongarch/introduction.rst | 15 +++++++++------
> > > Documentation/loongarch/irq-chip-model.rst | 22 +++++++++++++---------
> > > 2 files changed, 22 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/Documentation/loongarch/introduction.rst b/Documentation/loongarch/introduction.rst
> > > index 2bf40ad370df..216b3f390e80 100644
> > > --- a/Documentation/loongarch/introduction.rst
> > > +++ b/Documentation/loongarch/introduction.rst
> > > @@ -45,10 +45,12 @@ Name Alias Usage Preserved
> > > ``$r23``-``$r31`` ``$s0``-``$s8`` Static registers Yes
> > > ================= =============== =================== ============
> > >
> > > -Note: The register ``$r21`` is reserved in the ELF psABI, but used by the Linux
> > > -kernel for storing the percpu base address. It normally has no ABI name, but is
> > > -called ``$u0`` in the kernel. You may also see ``$v0`` or ``$v1`` in some old code,
> > > -however they are deprecated aliases of ``$a0`` and ``$a1`` respectively.
> > > +.. Note::
> > > + The register ``$r21`` is reserved in the ELF psABI, but used by the Linux
> > > + kernel for storing the percpu base address. It normally has no ABI name,
> > > + but is called ``$u0`` in the kernel. You may also see ``$v0`` or ``$v1``
> > > + in some old code,however they are deprecated aliases of ``$a0`` and ``$a1``
> > > + respectively.
> > >
> > > FPRs
> > > ----
> > > @@ -69,8 +71,9 @@ Name Alias Usage Preserved
> > > ``$f24``-``$f31`` ``$fs0``-``$fs7`` Static registers Yes
> > > ================= ================== =================== ============
> > >
> > > -Note: You may see ``$fv0`` or ``$fv1`` in some old code, however they are deprecated
> > > -aliases of ``$fa0`` and ``$fa1`` respectively.
> > > +.. Note::
> > > + You may see ``$fv0`` or ``$fv1`` in some old code, however they are
> > > + deprecated aliases of ``$fa0`` and ``$fa1`` respectively.
> > >
> > > VRs
> > > ----
> > > diff --git a/Documentation/loongarch/irq-chip-model.rst b/Documentation/loongarch/irq-chip-model.rst
> > > index 8d88f7ab2e5e..7988f4192363 100644
> > > --- a/Documentation/loongarch/irq-chip-model.rst
> > > +++ b/Documentation/loongarch/irq-chip-model.rst
> > > @@ -145,12 +145,16 @@ Documentation of Loongson's LS7A chipset:
> > >
> > > https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-EN.pdf (in English)
> > >
> > > -Note: CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described
> > > -in Section 7.4 of "LoongArch Reference Manual, Vol 1"; LIOINTC is "Legacy I/O
> > > -Interrupts" described in Section 11.1 of "Loongson 3A5000 Processor Reference
> > > -Manual"; EIOINTC is "Extended I/O Interrupts" described in Section 11.2 of
> > > -"Loongson 3A5000 Processor Reference Manual"; HTVECINTC is "HyperTransport
> > > -Interrupts" described in Section 14.3 of "Loongson 3A5000 Processor Reference
> > > -Manual"; PCH-PIC/PCH-MSI is "Interrupt Controller" described in Section 5 of
> > > -"Loongson 7A1000 Bridge User Manual"; PCH-LPC is "LPC Interrupts" described in
> > > -Section 24.3 of "Loongson 7A1000 Bridge User Manual".
> > > +.. Note::
> > > + - CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described
> > > + in Section 7.4 of "LoongArch Reference Manual, Vol 1";
> > > + - LIOINTC is "Legacy I/OInterrupts" described in Section 11.1 of
> > > + "Loongson 3A5000 Processor Reference Manual";
> > > + - EIOINTC is "Extended I/O Interrupts" described in Section 11.2 of
> > > + "Loongson 3A5000 Processor Reference Manual";
> > > + - HTVECINTC is "HyperTransport Interrupts" described in Section 14.3 of
> > > + "Loongson 3A5000 Processor Reference Manual";
> > > + - PCH-PIC/PCH-MSI is "Interrupt Controller" described in Section 5 of
> > > + "Loongson 7A1000 Bridge User Manual";
> > > + - PCH-LPC is "LPC Interrupts" described in Section 24.3 of
> > > + "Loongson 7A1000 Bridge User Manual".
And one more thing, is it needed to use a footnote syntax here?
Like:
balabala... CPUINTC [#cpuintc]_
.. [#cpuintc] CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described in Section 7.4 of "LoongArch Reference Manual, Vol 1";
Thanks,
Wu
