Hi, Arnd, On Wed, May 18, 2022 at 9:42 PM Arnd Bergmann <arnd@xxxxxxxx> wrote: > > On Wed, May 18, 2022 at 10:25 AM Huacai Chen <chenhuacai@xxxxxxxxxxx> wrote: > > > > LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. > > LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit > > version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its > > boot protocol LoongArch-specific interrupt controllers (similar to APIC) > > are already added in the next revision of ACPI Specification (current > > revision is 6.4). > > > > This patchset is adding basic LoongArch support in mainline kernel, we > > can see a complete snapshot here: > > https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson.git/log/?h=loongarch-next > > Stephen, can you add this branch to the linux-next tree? > > I see there are still comments coming in, but at some point this has > to just be considered good enough that any further changes can be addressed > with patches on top rather than rebasing. > > > V10 -> V11: > > 1, Rebased on asm-generic tree; > > I was expecting that you'd base this on just the spinlock changes from Palmer's > tree that are part of the asm-generic tree rather than all of what I have. > > Can you rebase it once more? If there are conflicts against the h8300 removal > series that is also in asm-generic, leaving it on top of that may be > easier though. Thank you very much, I have rebased the below tree on asm-generic tree's spinlock commit 9282d0996936c5fbf877c0d096a3feb45 again, and fixed some small problems from Eric and WANG Xuerui's comments in V11. https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson.git/log/?h=loongarch-next Huacai > > Arnd
