On 09/05/2022 16:48, Mark Brown wrote:
> On Mon, May 09, 2022 at 03:42:49PM +0100, James Clark wrote:
>> Dwarf based unwinding in a function that pushes SVE registers onto
>> the stack requires the unwinder to know the length of the SVE register
>> to calculate the stack offsets correctly. This was added to the Arm
>> specific Dwarf spec as the VG pseudo register[1].
>>
>> Add the vector length at position 46 if it's requested by userspace and
>> SVE is supported. If it's not supported then fail to open the event.
>>
>> The vector length must be on each sample because it can be changed
>> at runtime via a prctl or ptrace call. Also by adding it as a register
>> rather than a separate attribute, minimal changes will be required in an
>> unwinder that already indexes into the register list.
>
>> +static u64 perf_ext_regs_value(int idx)
>> +{
>> + switch (idx) {
>> + case PERF_REG_ARM64_VG:
>> + if (WARN_ON_ONCE(!system_supports_sve()))
>> + return 0;
>
> These WARN_ON_ONCE()s seem a bit loud but I do see they are idiomatic
> for this code so
They should never ever be hit because the mask is validated when opening
the event so hopefully it's not an issue.
>
> Reviewed-by: Mark Brown <broonie@xxxxxxxxxx>
Thanks Mark
