> Subject: [PATCH v6 3/6] fpga: dfl: check released_port_num and num_vfs for > legacy model > > From: Tianfei zhang <tianfei.zhang@xxxxxxxxx> > > In OFS legacy model, there is 1:1 mapping for Port device and VF, > so it need to check the number of released port match the number of > VFs or not. But in "Multiple VFs per PR slot" model, there is 1:N > mapping for the Port device and VFs. The title and commit message seems not matching the code..
