On Thu, 13 Jan 2022 at 09:11, James Clark <james.clark@xxxxxxx> wrote:
>
> When enabled, all taken branch addresses are output, even if the branch
> was because of a direct branch instruction. This enables reconstruction
> of the program flow without having access to the memory image of the
> code being executed.
>
> Use bit 8 for the config option which would be the correct bit for
> programming ETMv3. Although branch broadcast can't be enabled on ETMv3
> because it's not in the define ETM3X_SUPPORTED_OPTIONS, using the
> correct bit might help prevent future collisions or allow it to be
> enabled if needed.
>
> Signed-off-by: James Clark <james.clark@xxxxxxx>
> ---
> drivers/hwtracing/coresight/coresight-etm-perf.c | 2 ++
> drivers/hwtracing/coresight/coresight-etm4x-core.c | 10 ++++++++++
> include/linux/coresight-pmu.h | 2 ++
> 3 files changed, 14 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index c039b6ae206f..43bbd5dc3d3b 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -52,6 +52,7 @@ static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
> * The PMU formats were orignally for ETMv3.5/PTM's ETMCR 'config';
> * now take them as general formats and apply on all ETMs.
> */
> +PMU_FORMAT_ATTR(branch_broadcast, "config:"__stringify(ETM_OPT_BRANCH_BROADCAST));
> PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
> /* contextid1 enables tracing CONTEXTIDR_EL1 for ETMv4 */
> PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID));
> @@ -97,6 +98,7 @@ static struct attribute *etm_config_formats_attr[] = {
> &format_attr_sinkid.attr,
> &format_attr_preset.attr,
> &format_attr_configid.attr,
> + &format_attr_branch_broadcast.attr,
> NULL,
> };
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> index bf18128cf5de..04669ecc0efa 100644
> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
> @@ -692,6 +692,16 @@ static int etm4_parse_event_config(struct coresight_device *csdev,
> ret = cscfg_csdev_enable_active_config(csdev, cfg_hash, preset);
> }
>
> + /* branch broadcast - enable if selected and supported */
> + if (attr->config & BIT(ETM_OPT_BRANCH_BROADCAST)) {
> + if (!drvdata->trcbb) {
> + ret = -EINVAL;
> + goto out;
> + } else {
> + config->cfg |= BIT(ETM4_CFG_BIT_BB);
> + }
> + }
> +
> out:
> return ret;
> }
> diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h
> index 4ac5c081af93..6c2fd6cc5a98 100644
> --- a/include/linux/coresight-pmu.h
> +++ b/include/linux/coresight-pmu.h
> @@ -18,6 +18,7 @@
> * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
> * directly use below macros as config bits.
> */
> +#define ETM_OPT_BRANCH_BROADCAST 8
> #define ETM_OPT_CYCACC 12
> #define ETM_OPT_CTXTID 14
> #define ETM_OPT_CTXTID2 15
> @@ -25,6 +26,7 @@
> #define ETM_OPT_RETSTK 29
>
> /* ETMv4 CONFIGR programming bits for the ETM OPTs */
> +#define ETM4_CFG_BIT_BB 3
> #define ETM4_CFG_BIT_CYCACC 4
> #define ETM4_CFG_BIT_CTXTID 6
> #define ETM4_CFG_BIT_VMID 7
> --
> 2.28.0
>
Reviewed-by: Mike Leach <mike.leach@xxxxxxxxxx>
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
