tree: https://github.com/atishp04/linux sbi_pmu_v5 head: f9c08d001f70231844a69743e2d1655ece0e6628 commit: 7b33e2daa65b35b1541d0061a5066efdbac70a4d [9/12] RISC-V: Add interrupt support for perf config: riscv-allyesconfig (https://download.01.org/0day-ci/archive/20211218/202112181958.puDbjktS-lkp@xxxxxxxxx/config) compiler: riscv64-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/atishp04/linux/commit/7b33e2daa65b35b1541d0061a5066efdbac70a4d git remote add atishp04 https://github.com/atishp04/linux git fetch --no-tags atishp04 sbi_pmu_v5 git checkout 7b33e2daa65b35b1541d0061a5066efdbac70a4d # save the config file to linux build tree mkdir build_dir COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/perf/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All warnings (new ones prefixed by >>): drivers/perf/riscv_pmu_sbi.c:38: warning: cannot understand function prototype: 'union sbi_pmu_ctr_info *pmu_ctr_list; ' >> drivers/perf/riscv_pmu_sbi.c:470: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * This function starts all the used counters in two step approach. vim +470 drivers/perf/riscv_pmu_sbi.c 468 469 /** > 470 * This function starts all the used counters in two step approach. 471 * Any counter that did not overflow can be start in a single step 472 * while the overflowed counters need to be started with updated initialization 473 * value. 474 */ 475 static inline void pmu_sbi_start_overflow_mask(struct riscv_pmu *pmu, 476 unsigned long ctr_ovf_mask) 477 { 478 int idx = 0; 479 struct cpu_hw_events *cpu_hw_evt = this_cpu_ptr(pmu->hw_events); 480 struct perf_event *event; 481 unsigned long flag = SBI_PMU_START_FLAG_SET_INIT_VALUE; 482 unsigned long ctr_start_mask = 0; 483 uint64_t max_period; 484 struct hw_perf_event *hwc; 485 u64 init_val = 0; 486 487 ctr_start_mask = cpu_hw_evt->used_event_ctrs[0] & ~ctr_ovf_mask; 488 489 /* Start all the counters that did not overflow in a single shot */ 490 sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, 0, ctr_start_mask, 491 0, 0, 0, 0); 492 493 /* Reinitialize and start all the counter that overflowed */ 494 while(ctr_ovf_mask) { 495 if (ctr_ovf_mask & 0x01) { 496 event = cpu_hw_evt->events[idx]; 497 hwc = &event->hw; 498 max_period = riscv_pmu_ctr_get_width_mask(event); 499 init_val = local64_read(&hwc->prev_count) & max_period; 500 sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_START, idx, 1, 501 flag, init_val, 0, 0); 502 } 503 ctr_ovf_mask = ctr_ovf_mask >> 1; 504 idx++; 505 } 506 } 507 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
