Hi, Christoph,
On Fri, Sep 17, 2021 at 2:12 PM Christoph Hellwig <hch@xxxxxxxxxxxxx> wrote:
>
> > +
> > +/*
> > + * Change "struct page" to physical address.
> > + */
> > +#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
>
> Why is this using a dma_addr_t? phys_addr_t would be the right type
> here.
Sorry, this is a mistake, I will change to phys_addr_t.
>
> > +
> > +extern void __init __iomem *early_ioremap(u64 phys_addr, unsigned long size);
> > +extern void __init early_iounmap(void __iomem *addr, unsigned long size);
> > +
> > +#define early_memremap early_ioremap
> > +#define early_memunmap early_iounmap
> > +
> > +static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,
> > + unsigned long prot_val)
> > +{
> > + if (prot_val == _CACHE_CC)
> > + return (void __iomem *)(unsigned long)(CAC_BASE + offset);
> > + else
> > + return (void __iomem *)(unsigned long)(UNCAC_BASE + offset);
> > +}
>
> There is no real need for this ioremap_prot multiplexer
>
> > +/*
> > + * ioremap_cache - map bus memory into CPU space
> > + * @offset: bus address of the memory
> > + * @size: size of the resource to map
> > + *
> > + * ioremap_cache performs a platform specific sequence of operations to
> > + * make bus memory CPU accessible via the readb/readw/readl/writeb/
> > + * writew/writel functions and the other mmio helpers. The returned
> > + * address is not guaranteed to be usable directly as a virtual
> > + * address.
> > + *
> > + * This version of ioremap ensures that the memory is marked cachable by
> > + * the CPU. Also enables full write-combining. Useful for some
> > + * memory-like regions on I/O busses.
> > + */
> > +#define ioremap_cache(offset, size) \
> > + ioremap_prot((offset), (size), _CACHE_CC)
>
> Please don't add ioremap_cache to new ports.
I found there are several call sites in drivers, and I think they
really need a cacheable map.
Huacai
