On Monday 04 March 2013, Ley Foon Tan wrote: > This IP core is not in the SoC. This core is in the FPGA and can be > accessed by the Nios II processor or accessed by SOCFPGA processor (ARM > based) via its interface to FPGA. Due to this, I think it shouldn't use > infrastructure in drivers/base/soc.c. > What do you think? The sysid component gives a version for the entire FPGA part and all components inside it, right? I think you should use the drivers/base/soc.c interface to describe the SOCFPGA SoC components as well as the actual FPGA. You basically end up having one device node that acts as the parent for the SoC components, and a way to retrieve version information about it. Depending on how it fits the actual hardware layout more closely, you could have one node as the parent for all devices, or the FPGA SoC node as a child of the main one, or two SoC nodes side by side from the top-level. Arnd -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
