Hi Mark, On Fri, Feb 22, 2013 at 11:32 PM, Mark Brown <broonie@xxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote: > On Fri, Feb 22, 2013 at 07:59:11PM +0530, Manish Badarkhe wrote: >> On Fri, Feb 22, 2013 at 6:07 PM, Laxman Dewangan <ldewangan@xxxxxxxxxx> wrote: >> > Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller >> > is different than the older SoCs SPI controller in internal design as >> > well as register interface. >> > >> > This driver supports the: >> > - non DMA based transfer for smaller transfer i.e. less than FIFO depth. >> > - APB DMA based transfer for lager transfer i.e. more than FIFO depth. >> >> s/lager/larger >> >> > - Clock gating through runtime PM callbacks. >> > - registration through DT only. > > Delete unneeded context from your replies, we shouldn't need to page > through the entire patch because you've noticed a spelling error... Thanks for your reply. I will take care of this later on. Thanks Manish Badarkhe -- To unsubscribe from this list: send the line "unsubscribe linux-doc" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
