The changes since v5 have been very minor, just some tags and a few
wording changes to the qspinlock comment. There's also a PR for Arnd's
tree, assuming that lands I'll take the RISC-V bits into my tree and
assuming the csky and openrisc folks don't say anything I'll take those
too (though now that we're got a multi-tree merge going that doesn't
matter so much, but I said I'd take them so I'm going to default to
that as everyone else may have tuned out).
Changes since v4 <20220430153626.30660-1-palmer@xxxxxxxxxxxx>:
* Some wording cleanups for the qspinlock comment.
* Collected reviewed/tested tags.
Changes since v3 <20220414220214.24556-1-palmer@xxxxxxxxxxxx>:
* Added a smp_mb() in the lock slow-path, to make sure that is RCsc.
* Fixed the header guards.
Changes since v2 <20220319035457.2214979-1-guoren@xxxxxxxxxx>:
* Picked up Peter's SOBs, which were posted on the v1.
* Re-ordered the first two patches, as they
* Re-worded the RISC-V qrwlock patch, as it was a bit mushy. I also
added a blurb in the qrwlock's top comment about this dependency.
* Picked up Stafford's fix for big-endian systems, which I have not
tested as I don't have one (at least easily availiable, I think the BE
MIPS systems are still in that pile in my garage).
* Call the generic version <asm-genenic/spinlock{_types}.h>, as there's
really no utility to the version that only errors out.
Changes since v1 <20220316232600.20419-1-palmer@xxxxxxxxxxxx>:
* Follow Arnd suggestion to make the patch series more generic.
* Add csky in the series.
* Combine RISC-V's two patches into one.
* Modify openrisc's patch to suit the new generic version.
