On Tue, Apr 06, 2021 at 09:15:50AM +0200, Peter Zijlstra wrote: > Anyway, given you have such a crap architecture (and here I thought > RISC-V was supposed to be a modern design *sigh*), you had better go > look at the sparc64 atomic implementation which has a software backoff > for failed CAS in order to make fwd progress. It wasn't supposed to be modern. It was supposed to use boring old ideas. Where it actually did that it is a great ISA, in parts where academics actually tried to come up with cool or state of the art ideas (interrupt handling, tlb shootdowns, the totally fucked up memory model) it turned into a trainwreck.
