Thx for the patch. On Tue, Apr 21, 2020 at 3:56 PM Liu Yibin <yibin_liu@xxxxxxxxx> wrote: > > MSA register should shift to the right 29 for bits, > rather than 28 bits. > > Signed-off-by: Liu Yibin <yibin_liu@xxxxxxxxx> > --- > arch/csky/abiv1/inc/abi/entry.h | 6 ++++-- > arch/csky/abiv2/inc/abi/entry.h | 6 ++++-- > 2 files changed, 8 insertions(+), 4 deletions(-) > > diff --git a/arch/csky/abiv1/inc/abi/entry.h b/arch/csky/abiv1/inc/abi/entry.h > index 5056ebb..1dc5ed8 100644 > --- a/arch/csky/abiv1/inc/abi/entry.h > +++ b/arch/csky/abiv1/inc/abi/entry.h > @@ -16,6 +16,8 @@ > #define LSAVE_A4 40 > #define LSAVE_A5 44 > > +#define MSA_SHIFT 29 > + > #define usp ss1 > > .macro USPTOKSP > @@ -167,8 +169,8 @@ > * BA Reserved C D V > */ > cprcr r6, cpcr30 > - lsri r6, 28 > - lsli r6, 28 > + lsri r6, MSA_SHIFT > + lsli r6, MSA_SHIFT > addi r6, 0xe > cpwcr r6, cpcr30 > > diff --git a/arch/csky/abiv2/inc/abi/entry.h b/arch/csky/abiv2/inc/abi/entry.h > index a99aff5..2507cbf 100644 > --- a/arch/csky/abiv2/inc/abi/entry.h > +++ b/arch/csky/abiv2/inc/abi/entry.h > @@ -14,6 +14,8 @@ > #define LSAVE_A2 32 > #define LSAVE_A3 36 > > +#define MSA_SHIFT 29 > + > #define KSPTOUSP > #define USPTOKSP > > @@ -285,8 +287,8 @@ > */ > mfcr r6, cr<30, 15> /* Get MSA0 */ > 2: > - lsri r6, 28 > - lsli r6, 28 > + lsri r6, MSA_SHIFT > + lsli r6, MSA_SHIFT Yes, it's 512MB align and we should only reserve highest 3 bits. But I'll change it to with keeping the primary author: - lsri r6, 28 - lsli r6, 28 + lsri r6, 29 + lsli r6, 29 > addi r6, 0x1ce > mtcr r6, cr<30, 15> /* Set MSA0 */ > > -- > 2.7.4 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
