Question about crypto: cavium - Add Support for Octeon-tx CPT Engine

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Hi George,

In 2017 you added support for Octeon-tx CPT Engine
in drivers/crypto/cavium/cpt

I just happen to stumble on this piece of source code.

static void cpt_disable_cores(struct cpt_device *cpt, u64 coremask,
                  u8 type, u8 grp)
{
    u64 pf_exe_ctl;
    u32 timeout = 100;
...
    while (grp & coremask) {
...
        if (timeout--)
            break;
...
    }

This looks a bit weird to me. The if condition is always true when
the while loop runs for the first time.

Looking at the code, I think the intention was to try max 100 times
to see if the cores were actually disabled. The current code is certainly
not doing that. Perhaps you wanted this:
    if (--timeout == 0)
        break;

May I ask you to have another look at your code to see if it is really doing
what you wanted the code to do? And note, the same is done in
cpt_disable_all_cores().

Kind regards,
Kees Bakker




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