Re: [PATCH v9 00/23] Support more Amlogic SoC families in crypto driver

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Hi,

On 20/08/2024 16:56, Alexey Romanov wrote:
Hello!

This patchset expand the funcionality of the Amlogic
crypto driver by adding support for more SoC families:
AXG, G12A, G12B, SM1, A1, S4.

Also specify and enable crypto node in device tree
for reference Amlogic devices.

Tested on GXL, AXG, G12A/B, SM1, A1 and S4 devices via
custom tests [1] and tcrypt module.

On which tree did you base yourself ? It fails to apply patch 20 on next-20240820 and 6.11-rc4

Neil


---

Changes V1 -> V2 [2]:

- Rebased over linux-next.
- Adjusted device tree bindings description.
- A1 and S4 dts use their own compatible, which is a G12 fallback.

Changes V2 -> V3 [3]:

- Fix errors in dt-bindings and device tree.
- Add new field in platform data, which determines
whether clock controller should be used for crypto IP.
- Place back MODULE_DEVICE_TABLE.
- Correct commit messages.

Changes V3 -> V4 [4]:

- Update dt-bindings as per Krzysztof Kozlowski comments.
- Fix bisection: get rid of compiler errors in some patches.

Changes V4 -> V5 [5]:

- Tested on GXL board:
   1. Fix panic detected by Corentin Labbe [6].
   2. Disable hasher backend for GXL: in its current realization
      is doesn't work. And there are no examples or docs in the
      vendor SDK.
- Fix AES-CTR realization: legacy boards (gxl, g12, axg) requires
   inversion of the keyiv at keys setup stage.
- A1 now uses its own compatible string.
- S4 uses A1 compatible as fallback.
- Code fixes based on comments Neil Atrmstrong and Rob Herring.
- Style fixes (set correct indentations)

Changes V5 -> V6 [7]:

- Fix DMA sync warning reported by Corentin Labbe [8].
- Remove CLK input from driver. Remove clk definition
   and second interrput line from crypto node inside GXL dtsi.

Changes V6 -> V7 [9]:

- Fix dt-schema: power domain now required only for A1.
- Use crypto_skcipher_ctx_dma() helper for cipher instead of
   ____cacheline_aligned.
- Add import/export functions for hasher.
- Fix commit message for patch 17, acorrding to discussion [10].

Changes V7 -> V8 [11]:

- Test patchset with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS: fix some bugs
   in hasher logic.
- Use crypto crypto_ahash_ctx_dma in hasher code.
- Correct clock definition: clk81 is required for all SoC's.
- Add fixed-clock (clk81) definition for A1/S4.
- Add information (in commit messages) why different compatibles are used.

Changes V8 -> V9 [12]:

- Remove required field clk-names from dt-schema according to Rob Herring
recommendation [13].
- Fix commit order: all dt-bindings schema commits now located earlier
than any changes in device tree.
- Fix typos and add more clarifications in dt-schema patches.

Links:
   - [1] https://gist.github.com/mRrvz/3fb8943a7487ab7b943ec140706995e7
   - [2] https://lore.kernel.org/all/20240110201216.18016-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [3] https://lore.kernel.org/all/20240123165831.970023-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [4] https://lore.kernel.org/all/20240205155521.1795552-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [5] https://lore.kernel.org/all/20240212135108.549755-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [6] https://lore.kernel.org/all/ZcsYaPIUrBSg8iXu@Red/
   - [7] https://lore.kernel.org/all/20240301132936.621238-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [8] https://lore.kernel.org/all/Zf1BAlYtiwPOG-Os@Red/
   - [9] https://lore.kernel.org/all/20240326153219.2915080-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [10] https://lore.kernel.org/all/20240329-dotted-illusive-9f0593805a05@wendy/
   - [11] https://lore.kernel.org/all/20240411133832.2896463-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [12] https://lore.kernel.org/all/20240607141242.2616580-1-avromanov@xxxxxxxxxxxxxxxxx/
   - [13] https://lore.kernel.org/all/20240610222827.GA3166929-robh@xxxxxxxxxx/

Alexey Romanov (23):
   drivers: crypto: meson: don't hardcode IRQ count
   drviers: crypto: meson: add platform data
   drivers: crypto: meson: remove clock input
   drivers: crypto: meson: add MMIO helpers
   drivers: crypto: meson: move get_engine_number()
   drivers: crypto: meson: drop status field from meson_flow
   drivers: crypto: meson: move algs definition and cipher API to
     cipher.c
   drivers: crypto: meson: cleanup defines
   drivers: crypto: meson: process more than MAXDESCS descriptors
   drivers: crypto: meson: avoid kzalloc in engine thread
   drivers: crypto: meson: introduce hasher
   drivers: crypto: meson: add support for AES-CTR
   drivers: crypto: meson: use fallback for 192-bit keys
   drivers: crypto: meson: add support for G12-series
   drivers: crypto: meson: add support for AXG-series
   drivers: crypto: meson: add support for A1-series
   dt-bindings: crypto: meson: correct clk and remove second interrupt
     line
   dt-bindings: crypto: meson: support new SoC's
   arch: arm64: dts: meson: gxl: correct crypto node definition
   arch: arm64: dts: meson: a1: add crypto node
   arch: arm64: dts: meson: s4: add crypto node
   arch: arm64: dts: meson: g12: add crypto node
   arch: arm64: dts: meson: axg: add crypto node

  .../bindings/crypto/amlogic,gxl-crypto.yaml   |  32 +-
  arch/arm64/boot/dts/amlogic/meson-a1.dtsi     |  14 +
  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |   7 +
  .../boot/dts/amlogic/meson-g12-common.dtsi    |   7 +
  arch/arm64/boot/dts/amlogic/meson-gxl.dtsi    |   6 +-
  arch/arm64/boot/dts/amlogic/meson-s4.dtsi     |  13 +
  drivers/crypto/amlogic/Makefile               |   2 +-
  drivers/crypto/amlogic/amlogic-gxl-cipher.c   | 632 ++++++++++++------
  drivers/crypto/amlogic/amlogic-gxl-core.c     | 292 ++++----
  drivers/crypto/amlogic/amlogic-gxl-hasher.c   | 507 ++++++++++++++
  drivers/crypto/amlogic/amlogic-gxl.h          | 118 +++-
  11 files changed, 1269 insertions(+), 361 deletions(-)
  create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c






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