On Mon, Apr 15, 2024 at 03:16:18PM -0700, Chang S. Bae wrote: > > First, surely it's the case that in practice, all CPUs that support Key Locker > > also support AVX? If so, then there's no need for the Key Locker assembly to > > use legacy SSE instructions. It should instead target AVX and use VEX-coded > > instructions. This would save some instructions and improve performance. > > Unfortunately, the Key Locker instructions using the AVX states were never > implemented. Sure, you could still use VEX-coded 128-bit instructions for everything other than the actual AES (for example, the XTS tweak computation) though, right? They're a bit more convenient to work with since they are non-destructive. - Eric
