Hello Herbert, On Fri, Apr 12, 2024 at 10:53:49AM +0800, Herbert Xu wrote: > On Thu, Apr 11, 2024 at 04:38:09PM +0300, Alexey Romanov wrote: > > > > Changes V6 -> V7 [9]: > > > > - Fix dt-schema: power domain now required only for A1. > > - Use crypto_skcipher_ctx_dma() helper for cipher instead of > > ____cacheline_aligned. > > - Add import/export functions for hasher. > > - Fix commit message for patch 17, acorrding to discussion [10]. > > Please ensure that this passes the self-tests with extra fuzzing > enabled. Old Amlogic Soc's for crypto HW used a BLKMV engine, which required a clk input and a second interrupt line. New SoC's uses DMA engine and don't need this. I spoke with vendor, and they confirmed that AXG, G12A, G12B, SM1, A1, S4 and GXL is using DMA engine and crypto HW is not connected to clk / second interrupt line. > > Thanks, > -- > Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> > Home Page: http://gondor.apana.org.au/~herbert/ > PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- Thank you, Alexey
