On January 23, 2024 1:44:27 AM PST, Borislav Petkov <bp@xxxxxxxxx> wrote: >On Tue, Jan 23, 2024 at 10:28:51AM +0800, Tony W Wang-oc wrote: >> Zhaoxin CPUs have implemented the SHA(Secure Hash Algorithm) as its >> instrucions. >> Add two CPU feature flags indicated by CPUID.(EAX=C0000001,ECX=0):EDX >> bit 25/26 which will be used by Zhaoxin SHA driver. >> >> Signed-off-by: Tony W Wang-oc <TonyWWang-oc@xxxxxxxxxxx> >> --- >> arch/x86/include/asm/cpufeatures.h | 4 +++- >> tools/arch/x86/include/asm/cpufeatures.h | 4 +++- >> 2 files changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h >> index 29cb275a219d..28b0e62dbdf5 100644 >> --- a/arch/x86/include/asm/cpufeatures.h >> +++ b/arch/x86/include/asm/cpufeatures.h >> @@ -145,7 +145,7 @@ >> #define X86_FEATURE_RDRAND ( 4*32+30) /* RDRAND instruction */ >> #define X86_FEATURE_HYPERVISOR ( 4*32+31) /* Running on a hypervisor */ >> >> -/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ >> +/* VIA/Cyrix/Centaur/Zhaoxin-defined CPU features, CPUID level 0xC0000001, word 5 */ > >Does that mean that all those companies agree on the contents of this >CPUID leaf? > >> #define X86_FEATURE_XSTORE ( 5*32+ 2) /* "rng" RNG present (xstore) */ >> #define X86_FEATURE_XSTORE_EN ( 5*32+ 3) /* "rng_en" RNG enabled */ >> #define X86_FEATURE_XCRYPT ( 5*32+ 6) /* "ace" on-CPU crypto (xcrypt) */ >> @@ -156,6 +156,8 @@ >> #define X86_FEATURE_PHE_EN ( 5*32+11) /* PHE enabled */ >> #define X86_FEATURE_PMM ( 5*32+12) /* PadLock Montgomery Multiplier */ >> #define X86_FEATURE_PMM_EN ( 5*32+13) /* PMM enabled */ >> +#define X86_FEATURE_PHE2 ( 5*32+25) /* "phe2" Zhaoxin Hash Engine */ >> +#define X86_FEATURE_PHE2_EN ( 5*32+26) /* "phe2_en" PHE2 enabled */ > ^^^^^^^^^ > >From: Documentation/arch/x86/cpuinfo.rst > >"a: Feature flags can be derived from the contents of CPUID leaves. >------------------------------------------------------------------ >These feature definitions are organized mirroring the layout of CPUID >leaves and grouped in words with offsets as mapped in enum cpuid_leafs >in cpufeatures.h (see arch/x86/include/asm/cpufeatures.h for details). >If a feature is defined with a X86_FEATURE_<name> definition in >cpufeatures.h, and if it is detected at run time, the flags will be >displayed accordingly in /proc/cpuinfo. For example, the flag "avx2" >comes from X86_FEATURE_AVX2 in cpufeatures.h." > >Is your grep broken? > Well, Centaur bought Cyrix, and then VIA bought Centaur. I think Zhaoxin is a joint venture between VIA and the City of Shanghai, or something like that?
