On 10/01/2024 21:11, Alexey Romanov wrote:
Not all Amlogic SoC's uses CLK controller.
In this case you must make clocks not required for the new platforms in the bindings.
Neil
Signed-off-by: Alexey Romanov <avromanov@xxxxxxxxxxxxxxxxx>
Signed-off-by: Jan Dakinevich <yvdakinevich@xxxxxxxxxxxxxxxxx>
---
drivers/crypto/amlogic/amlogic-gxl-core.c | 12 ++----------
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c
index a5df061f9890..e5f504fb477e 100644
--- a/drivers/crypto/amlogic/amlogic-gxl-core.c
+++ b/drivers/crypto/amlogic/amlogic-gxl-core.c
@@ -248,16 +248,10 @@ static int meson_crypto_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err);
return err;
}
- mc->busclk = devm_clk_get(&pdev->dev, "blkmv");
+ mc->busclk = devm_clk_get_optional_enabled(&pdev->dev, "blkmv");
if (IS_ERR(mc->busclk)) {
err = PTR_ERR(mc->busclk);
- dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err);
- return err;
- }
-
- err = clk_prepare_enable(mc->busclk);
- if (err != 0) {
- dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
+ dev_err(&pdev->dev, "Cannot get and enable core clock err=%d\n", err);
return err;
}
@@ -279,7 +273,6 @@ static int meson_crypto_probe(struct platform_device *pdev)
meson_unregister_algs(mc);
error_flow:
meson_free_chanlist(mc, mc->flow_cnt - 1);
- clk_disable_unprepare(mc->busclk);
return err;
}
@@ -295,7 +288,6 @@ static int meson_crypto_remove(struct platform_device *pdev)
meson_free_chanlist(mc, mc->flow_cnt - 1);
- clk_disable_unprepare(mc->busclk);
return 0;
}
