On Mon, Nov 27, 2023 at 03:06:51PM +0800, Jerry Shih wrote: > From: Heiko Stuebner <heiko.stuebner@xxxxxxxx> > > VLEN describes the length of each vector register and some instructions > need specific minimal VLENs to work correctly. > > The vector code already includes a variable riscv_v_vsize that contains > the value of "32 vector registers with vlenb length" that gets filled > during boot. vlenb is the value contained in the CSR_VLENB register and > the value represents "VLEN / 8". > > So add riscv_vector_vlen() to return the actual VLEN value for in-kernel > users when they need to check the available VLEN. > > Signed-off-by: Heiko Stuebner <heiko.stuebner@xxxxxxxx> > Signed-off-by: Jerry Shih <jerry.shih@xxxxxxxxxx> > --- > arch/riscv/include/asm/vector.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) Reviewed-by: Eric Biggers <ebiggers@xxxxxxxxxx> - Eric
