On Oct 7, 2023, at 03:47, Eric Biggers <ebiggers@xxxxxxxxxx> wrote: > On Fri, Sep 15, 2023 at 11:21:28AM +0800, Jerry Shih wrote: >> On Sep 15, 2023, at 09:48, He-Jie Shih <bignose1007@xxxxxxxxx> wrote: >> >> The OpenSSL PR is at [1]. >> And we are from SiFive. >> >> -Jerry >> >> [1] >> https://github.com/openssl/openssl/pull/21923 > > Hi Jerry, I'm wondering if you have an update on this? Do you need any help? The RISC-V vector crypto OpenSSL pr[1] is merged. And we also sent the vector-crypto patch based on Heiko's and OpenSSL works. Here is the link: https://lore.kernel.org/all/20231025183644.8735-1-jerry.shih@xxxxxxxxxx/ [1] https://github.com/openssl/openssl/pull/21923 > I'm also wondering about riscv.pm and the choice of generating the crypto > instructions from .words instead of using the assembler. It makes it > significantly harder to review the code, IMO. Can we depend on assembler > support for these instructions, or is that just not ready yet? > > - Eric There is no public assembler supports the vector-crypto asm mnemonics. We should still use `opcode` for vector-crypto instructions. But we might use asm for standard rvv parts. In order to reuse the codes in OpenSSL as much as possible, we still use the `riscv.pm` for all standard rvv and vector-crypto instructions. If the asm mnemonic is still a better approach, I will `rewrite` all standard rvv parts with asm mnemonics in next patch. -Jerry
