Re: [v2 PATCH 0/5] crypto: Add akcipher interface without SGs

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On Wed, 28 Jun 2023 at 10:45, Ard Biesheuvel <ardb@xxxxxxxxxx> wrote:
>
> Both the sole acomp h/w implementation and the zswap acomp conversion
> were contributed by HiSilicon, and the code is synchronous.

I really think people need to realize that the age of async external
accelerators is long long gone.

Yes, it was cool in the 80s.

But dammit, so was big hair, mullets, and Sony Walkmans.

Just give it up. It's a complete failure, and it is not making a come-back.

What is still relevant is:

 (a) inline accelerators

     Doing checksumming, big packets, encryption etc ON THE NETWORK
CARD as it is being sent out and received is still very much relevant.

     But not this crazy "CPU gives data to external accelerator, does
something else, and is notified of the result and goes back to look at
it" is bogus and completely wrong.

 (b) synchronous CPU accelerated routines

     Whether this is using just vector instructions, or special
hardware, they are synchronous, and they use CPU virtual addresses
directly.

and nothing else matters.

Christ, people, Metallica even wrote one of the greatest song of all
time about it! How much more proof do you need?

I seriously believe that the crypto layer should basically aim to get
rid of the silly async interface entirely. It adds no real value, and
it has caused endless amounts of pain.

                 Linus



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