On Thu, 6 Apr 2023 at 19:29, Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> wrote:
>
> On 5.04.2023 09:28, Bhupesh Sharma wrote:
> > Add crypto engine (CE) and CE BAM related nodes and definitions to
> > 'sm8250.dtsi'.
> >
> > Co-developed-by and Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@xxxxxxxxxx>
> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++++++++++++++++++++++
> > 1 file changed, 22 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > index 7b78761f2041..2f6b8d4a2d41 100644
> > --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> > @@ -2222,6 +2222,28 @@ ufs_mem_phy_lanes: phy@1d87400 {
> > };
> > };
> >
> > + cryptobam: dma-controller@1dc4000 {
> > + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> > + reg = <0 0x01dc4000 0 0x24000>;
> > + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> > + #dma-cells = <1>;
> > + qcom,ee = <0>;
> > + qcom,controlled-remotely;
> > + iommus = <&apps_smmu 0x594 0x0011>,
> > + <&apps_smmu 0x596 0x0011>;
> > + };
> > +
> > + crypto: crypto@1dfa000 {
> > + compatible = "qcom,sm8250-qce", "qcom,sm8150-qce", "qcom,qce";
> > + reg = <0 0x01dfa000 0 0x6000>;
> > + dmas = <&cryptobam 4>, <&cryptobam 5>;
> > + dma-names = "rx", "tx";
> > + iommus = <&apps_smmu 0x594 0x0011>,
> > + <&apps_smmu 0x596 0x0011>;
> > + interconnects = <&aggre2_noc MASTER_CRYPTO_CORE_0 &mc_virt SLAVE_EBI_CH0>;
> > + interconnect-names = "memory";
> Shouldn't we also attach the contexts from qcom_cedev_ns_cb{}?
Sure, I have fixed this in v7. Will share it shortly.
Thanks.
