As both SDCC and UFS drivers use the ICE with duplicated implementation, while none of the currently supported platforms make use concomitantly of the same ICE IP block instance, the new SM8550 allows both UFS and SDCC to do so. In order to support such scenario, there is a need for a unified implementation and a devicetree node to be shared between both types of storage devices. So lets drop the duplicate implementation of the ICE from both SDCC and UFS and make it a dedicated (soc) driver. Also, switch all UFS and SDCC devicetree nodes to use the new ICE approach. See each individual patch for changelogs. The v2 is here: https://lore.kernel.org/all/20230308155838.1094920-1-abel.vesa@xxxxxxxxxx/ Abel Vesa (7): dt-bindings: crypto: Add Qualcomm Inline Crypto Engine dt-bindings: mmc: sdhci-msm: Add ICE phandle and drop core clock dt-bindings: ufs: qcom: Add ICE phandle and drop core clock soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver scsi: ufs: ufs-qcom: Switch to the new ICE API mmc: sdhci-msm: Switch to the new ICE API arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node .../crypto/qcom,inline-crypto-engine.yaml | 42 +++ .../devicetree/bindings/mmc/sdhci-msm.yaml | 4 + .../devicetree/bindings/ufs/qcom,ufs.yaml | 4 + arch/arm64/boot/dts/qcom/sm8550.dtsi | 10 + drivers/mmc/host/Kconfig | 2 +- drivers/mmc/host/sdhci-msm.c | 215 ++--------- drivers/soc/qcom/Kconfig | 4 + drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/ice.c | 347 ++++++++++++++++++ drivers/ufs/host/Kconfig | 2 +- drivers/ufs/host/Makefile | 1 - drivers/ufs/host/ufs-qcom-ice.c | 244 ------------ drivers/ufs/host/ufs-qcom.c | 83 ++++- drivers/ufs/host/ufs-qcom.h | 32 +- include/soc/qcom/ice.h | 39 ++ 15 files changed, 575 insertions(+), 455 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml create mode 100644 drivers/soc/qcom/ice.c delete mode 100644 drivers/ufs/host/ufs-qcom-ice.c create mode 100644 include/soc/qcom/ice.h -- 2.34.1
