> -----Original Message----- > From: Conor Dooley <conor@xxxxxxxxxx> > Sent: 10 January, 2023 3:37 PM > To: JiaJie Ho <jiajie.ho@xxxxxxxxxxxxxxxx> > Cc: Olivia Mackall <olivia@xxxxxxxxxxx>; Herbert Xu > <herbert@xxxxxxxxxxxxxxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>; > Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>; Emil Renner > Berthing <kernel@xxxxxxxx>; Conor Dooley <conor.dooley@xxxxxxxxxxxxx>; > linux-crypto@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx; linux-riscv@xxxxxxxxxxxxxxxxxxx > Subject: RE: [PATCH v3 3/3] riscv: dts: starfive: Add TRNG node for VisionFive > 2 > > >> Which clock source is this? I see syscrg and aoncrg in the v3 > >> devicetree: > >> https://lore.kernel.org/linux-riscv/20221220011247.35560-7- > >> hal.feng@xxxxxxxxxxxxxxxx/ > >> > >> Have a missed a patchset which adds support for this particular clock > >> controller? At the very least, I don't think one has reached the > >> linux-riscv mailing list. > >> The clock driver patchset only has aoncrg & syscrg: > >> https://lore.kernel.org/linux-riscv/20221220005054.34518-1- > >> hal.feng@xxxxxxxxxxxxxxxx/ > >> > > > >Hi Conor, > > > >Thanks for reviewing the patches. > >Yes, the patch for stg domain hasn't been submitted yet. > >In this case should I drop this patch from the series until the related patches > reach the mailing list? > > Since it doesn't apply anyway, no harm keeping it IMO. > Having the dts can make it easier, although not in this case, to look at the > binding and driver. > Just mention it in the cover letter if/when you send another version. > Sure, I'll do this. Thanks, Jia Jie
