On 09/02/2022 13:47, Corentin Labbe wrote:
> Convert rockchip-crypto to yaml.
>
> Signed-off-by: Corentin Labbe <clabbe@xxxxxxxxxxxx>
> ---
> .../bindings/crypto/rockchip-crypto.txt | 28 --------
> .../bindings/crypto/rockchip-crypto.yaml | 64 +++++++++++++++++++
> 2 files changed, 64 insertions(+), 28 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> create mode 100644 Documentation/devicetree/bindings/crypto/rockchip-crypto.yaml
>
> diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> deleted file mode 100644
> index 5e2ba385b8c9..000000000000
> --- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> +++ /dev/null
> @@ -1,28 +0,0 @@
> -Rockchip Electronics And Security Accelerator
> -
> -Required properties:
> -- compatible: Should be "rockchip,rk3288-crypto"
> -- reg: Base physical address of the engine and length of memory mapped
> - region
> -- interrupts: Interrupt number
> -- clocks: Reference to the clocks about crypto
> -- clock-names: "aclk" used to clock data
> - "hclk" used to clock data
> - "sclk" used to clock crypto accelerator
> - "apb_pclk" used to clock dma
> -- resets: Must contain an entry for each entry in reset-names.
> - See ../reset/reset.txt for details.
> -- reset-names: Must include the name "crypto-rst".
> -
> -Examples:
> -
> - crypto: cypto-controller@ff8a0000 {
> - compatible = "rockchip,rk3288-crypto";
> - reg = <0xff8a0000 0x4000>;
> - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
> - <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
> - clock-names = "aclk", "hclk", "sclk", "apb_pclk";
> - resets = <&cru SRST_CRYPTO>;
> - reset-names = "crypto-rst";
> - };
> diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.yaml b/Documentation/devicetree/bindings/crypto/rockchip-crypto.yaml
> new file mode 100644
> index 000000000000..392d89055398
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.yaml
file name: rockchip,crypto.yaml or rockchip,rk3288-crypto.yaml.
Kind of depends whether there is another binding possible for newer
Crypto blocks from Rockchip. I guess it is quite possible, so maybe the
latter version.
> @@ -0,0 +1,64 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/rockchip-crypto.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip Electronics And Security Accelerator
> +
> +maintainers:
> + - Heiko Stuebner <heiko@xxxxxxxxx>
> +
> +properties:
> + compatible:
> + const: rockchip,rk3288-crypto
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: clock data
> + - description: clock data
> + - description: clock crypto accelerator
> + - description: clock dma
> +
> + clock-names:
> + items:
> + - const: aclk
> + - const: hclk
> + - const: sclk
> + - const: apb_pclk
> +
> + resets:
> + minItems: 1
Instead maxItems: 1
> +
> + reset-names:
> + const: crypto-rst
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + crypto: crypto@ff8a0000 {
> + compatible = "rockchip,rk3288-crypto";
> + reg = <0xff8a0000 0x4000>;
> + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>,
> + <&cru SCLK_CRYPTO>, <&cru ACLK_DMAC1>;
Does it work? Did you run dt_binding_check?
> + clock-names = "aclk", "hclk", "sclk", "apb_pclk";
> + resets = <&cru SRST_CRYPTO>;
> + reset-names = "crypto-rst";
> + };
Best regards,
Krzysztof
