On Tue, Jan 25, 2022 at 11:56:24PM +0530, Shijith Thotton wrote: > From: Srujana Challa <schalla@xxxxxxxxxxx> > > LDWB is getting incorrectly used in HW when > CPT_AF_LF()_PTR_CTL[IQB_LDWB]=1 and CPT instruction queue has less than > 320 free entries. So, increase HW instruction queue size by 320 and give > 320 entries less for SW/NIX RX as a SW workaround. > > Signed-off-by: Srujana Challa <schalla@xxxxxxxxxxx> > Signed-off-by: Shijith Thotton <sthotton@xxxxxxxxxxx> > --- > drivers/crypto/marvell/octeontx2/otx2_cptlf.h | 19 +++++++++++++++---- > 1 file changed, 15 insertions(+), 4 deletions(-) Patch applied. Thanks. -- Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
