On 17/12/2021 13:43, Geert Uytterhoeven wrote:
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>
> Hi Conor,
>
> On Fri, Dec 17, 2021 at 10:33 AM <conor.dooley@xxxxxxxxxxxxx> wrote:
>> From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>>
>> Split the device tree for the Microchip MPFS into two sections by adding
>> microchip-mpfs-fabric.dtsi, which contains peripherals contained in the
>> FPGA fabric.
>>
>> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>
> Thanks for your patch!
>
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
>> @@ -0,0 +1,13 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/* Copyright (c) 2020-2021 Microchip Technology Inc */
>> +
>> +/ {
>> + corePWM0: pwm@41000000 {
>> + compatible = "microchip,corepwm";
>> + reg = <0x0 0x41000000 0x0 0xF0>;
>> + microchip,sync-update = /bits/ 8 <0>;
>> + #pwm-cells = <2>;
>> + clocks = <&clkcfg CLK_FIC3>;
>> + status = "disabled";
>> + };
>
> I'm wondering if these should be grouped under a "fabric" subnode,
> like we have an "soc" subnode for on-SoC devices? Rob?
>
> BTW, do you already have a naming plan for different revisions of
> FPGA fabric cores?
Not yet (assuming you mean specifically how we will handle it in the
device tree) - although i was talking to someone about it yesterday.
It's possible that we might handle that via a register, but if you have
a suggestion or some precedence that you're aware of that would be useful.
The actual naming convention of the IP cores themselves, yeah. I will
dig it up for you on Monday.
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
>
