Re: [PATCH 12/13] riscv: icicle-kit: update microchip icicle kit device tree

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On 08/11/2021 21:40, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On 08/11/2021 16:05, conor.dooley@xxxxxxxxxxxxx wrote:
>> From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>>
>> Update the device tree for the icicle kit by splitting it into a third part,
>> which contains peripherals in the fpga fabric, add new peripherals
>> (spi, qspi, gpio, rtc, pcie, system services, i2c), update parts of the memory
>> map which have been changed.
> 
> This should be multiple commits because you mix up refactoring (split)
> and adding new features. The patch is really, really difficult to
> review. I gave up in the middle.
> 
>>
>> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>> ---
>>   .../dts/microchip/microchip-mpfs-fabric.dtsi  |  21 ++
>>   .../microchip/microchip-mpfs-icicle-kit.dts   | 159 +++++++--
>>   .../boot/dts/microchip/microchip-mpfs.dtsi    | 333 ++++++++++++++----
>>   3 files changed, 428 insertions(+), 85 deletions(-)
>>   create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
>>
>> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
>> new file mode 100644
>> index 000000000000..8fa3356494f1
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
>> @@ -0,0 +1,21 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/* Copyright (c) 2020-2021 Microchip Technology Inc */
>> +
>> +/ {
>> +     fpgadma: fpgadma@60020000 {
>> +             compatible = "microchip,mpfs-fpga-dma-uio";
>> +             #address-cells = <1>;
>> +             #size-cells = <0>;
>> +             reg = <0x0 0x60020000 0x0 0x1000>;
>> +             interrupt-parent = <&plic>;
>> +             interrupts = <PLIC_INT_FABRIC_F2H_2>;
>> +             status = "okay";
>> +     };
>> +
>> +     fpgalsram: fpga_lsram@61000000 {
> 
> Node names go with hyphen, but actually you should not need it, because
> the name should be generic, e.g. "uio".
sure, will change it to uio.
> 
> However there is no such compatible and checkpatch should complain about it.
yeah, this and the pac1934 i didnt send bindings for - erroneously 
thought i might not have to do so. ill get a binding sorted out for both 
of these.
> 
>> +             compatible = "generic-uio";
>> +             reg = <0x0 0x61000000 0x0 0x0001000
>> +                     0x14 0x00000000 0x0 0x00010000>;
>> +             status = "okay";
>> +     };
>> +};
>> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
>> index fc1e5869df1b..4212129fcdf1 100644
>> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
>> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
>> @@ -1,5 +1,5 @@
>>   // SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> -/* Copyright (c) 2020 Microchip Technology Inc */
>> +/* Copyright (c) 2020-2021 Microchip Technology Inc */
>>
>>   /dts-v1/;
>>
>> @@ -13,72 +13,187 @@ / {
>>        compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
>>
>>        aliases {
>> -             ethernet0 = &emac1;
>> -             serial0 = &serial0;
>> -             serial1 = &serial1;
>> -             serial2 = &serial2;
>> -             serial3 = &serial3;> +          mmuart0 = &mmuart0;
>> +             mmuart1 = &mmuart1;
>> +             mmuart2 = &mmuart2;
>> +             mmuart3 = &mmuart3;
>> +             mmuart4 = &mmuart4;
> 
> Why? Commit msg does not explain it.
changed to match all of our documentation
> 
>>        };
>>
>>        chosen {
>> -             stdout-path = "serial0:115200n8";
>> +             stdout-path = "mmuart1:115200n8";
>>        };
>>
>>        cpus {
>>                timebase-frequency = <RTCCLK_FREQ>;
>>        };
>>
>> -     memory@80000000 {
>> +     ddrc_cache_lo: memory@80000000 {
>>                device_type = "memory";
>> -             reg = <0x0 0x80000000 0x0 0x40000000>;
>> -             clocks = <&clkcfg 26>;
>> +             reg = <0x0 0x80000000 0x0 0x2e000000>;
>> +             clocks = <&clkcfg CLK_DDRC>;
>> +             status = "okay";
>> +     };
>> +
>> +     ddrc_cache_hi: memory@1000000000 {
>> +             device_type = "memory";
>> +             reg = <0x10 0x0 0x0 0x40000000>;
>> +             clocks = <&clkcfg CLK_DDRC>;
>> +             status = "okay";
>>        };
>>   };
>>
>> -&serial0 {
>> +&mmuart1 {
>>        status = "okay";
>>   };
>>
>> -&serial1 {
>> +&mmuart2 {
>>        status = "okay";
>>   };
>>
>> -&serial2 {
>> +&mmuart3 {
>>        status = "okay";
>>   };
>>
>> -&serial3 {
>> +&mmuart4 {
>>        status = "okay";
>>   };
>>
>>   &mmc {
>>        status = "okay";
>> -
>>        bus-width = <4>;
>>        disable-wp;
>>        cap-sd-highspeed;
>> +     cap-mmc-highspeed;
>>        card-detect-delay = <200>;
>> +     mmc-ddr-1_8v;
>> +     mmc-hs200-1_8v;
>>        sd-uhs-sdr12;
>>        sd-uhs-sdr25;
>>        sd-uhs-sdr50;
>>        sd-uhs-sdr104;
>>   };
>>
>> -&emac0 {
>> +&spi0 {
>> +     status = "okay";
>> +     spidev@0 {
>> +             compatible = "spidev";
> 
> 1. There is no such compatible,
> 2. You should have big fat warning when booting, so such DT cannot be
> accepted.
this one was an oversight from me, that compatible has never been 
"spidev" on its own in our internal stuff and i mustve accidentally 
dropped a vendor string while making these patches.
> 
>> +             reg = <0>; /* CS 0 */
>> +             spi-max-frequency = <10000000>;
>> +             status = "okay";
>> +     };
>> +};
>> +
>> +&spi1 {
>> +     status = "okay";
>> +};
>> +
>> +&qspi {
>> +     status = "okay";
>> +};
>> +
>> +&i2c0 {
>> +     status = "okay";
>> +};
>> +
>> +&i2c1 {
>> +     status = "okay";
>> +     pac193x: pac193x@10 {
> 
> Generic node name. Looks like compatible is not documented, so first
> bindings.
> 
as above
> 
>> +             compatible = "microchip,pac1934";
>> +             reg = <0x10>;
>> +             samp-rate = <64>;
>> +             status = "okay";
>> +             ch0: channel0 {
>> +                     uohms-shunt-res = <10000>;
>> +                     rail-name = "VDDREG";
>> +                     channel_enabled;
>> +             };
>> +             ch1: channel1 {
>> +                     uohms-shunt-res = <10000>;
>> +                     rail-name = "VDDA25";
>> +                     channel_enabled;
>> +             };
>> +             ch2: channel2 {
>> +                     uohms-shunt-res = <10000>;
>> +                     rail-name = "VDD25";
>> +                     channel_enabled;
>> +             };
>> +             ch3: channel3 {
>> +                     uohms-shunt-res = <10000>;
>> +                     rail-name = "VDDA_REG";
>> +                     channel_enabled;
>> +             };
>> +     };
>> +};
>> +
>> +&mac0 {
>> +     status = "okay";
>>        phy-mode = "sgmii";
>>        phy-handle = <&phy0>;
>> -     phy0: ethernet-phy@8 {
>> -             reg = <8>;
>> -             ti,fifo-depth = <0x01>;
>> -     };
>>   };
>>
>> -&emac1 {
>> +&mac1 {
> 
> I gave up here, it's not easy to find what is effect of refactoring,
> what is a new node.
yeah, ill split it into several patches - probably one for the 
splitting, one for the new defines, one for the changes to existing 
nodes and one for node additions.
> 
> Best regards,
> Krzysztof
> 





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