Hi Richard, Thank you for the patch! Yet something to improve: [auto build test ERROR on herbert-cryptodev-2.6/master] [also build test ERROR on herbert-crypto-2.6/master v5.15-rc7 next-20211026] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Richard-van-Schagen/Enable-the-Mediatek-EIP-93-crypto-engine/20211025-175520 base: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master config: nios2-allyesconfig (attached as .config) compiler: nios2-linux-gcc (GCC) 11.2.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/837eaffbc258885acfac24a243519105d3ea21ca git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Richard-van-Schagen/Enable-the-Mediatek-EIP-93-crypto-engine/20211025-175520 git checkout 837eaffbc258885acfac24a243519105d3ea21ca # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=nios2 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All errors (new ones prefixed by >>): >> drivers/crypto/mtk-eip93/eip93-main.c:124:6: error: no previous prototype for 'mtk_handle_result_descriptor' [-Werror=missing-prototypes] 124 | void mtk_handle_result_descriptor(struct mtk_device *mtk) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/crypto/mtk-eip93/eip93-main.c: In function 'mtk_handle_result_descriptor': >> drivers/crypto/mtk-eip93/eip93-main.c:128:26: error: variable 'complete' set but not used [-Werror=unused-but-set-variable] 128 | bool last_entry, complete; | ^~~~~~~~ drivers/crypto/mtk-eip93/eip93-main.c: At top level: >> drivers/crypto/mtk-eip93/eip93-main.c:221:6: error: no previous prototype for 'mtk_initialize' [-Werror=missing-prototypes] 221 | void mtk_initialize(struct mtk_device *mtk) | ^~~~~~~~~~~~~~ drivers/crypto/mtk-eip93/eip93-main.c:438:34: error: array type has incomplete element type 'struct of_device_id' 438 | static const struct of_device_id mtk_crypto_of_match[] = { | ^~~~~~~~~~~~~~~~~~~ >> drivers/crypto/mtk-eip93/eip93-main.c:438:34: error: 'mtk_crypto_of_match' defined but not used [-Werror=unused-variable] cc1: all warnings being treated as errors -- >> drivers/crypto/mtk-eip93/eip93-aead.c:16:10: fatal error: crypto/sha.h: No such file or directory 16 | #include <crypto/sha.h> | ^~~~~~~~~~~~~~ compilation terminated. vim +/mtk_handle_result_descriptor +124 drivers/crypto/mtk-eip93/eip93-main.c 123 > 124 void mtk_handle_result_descriptor(struct mtk_device *mtk) 125 { 126 struct crypto_async_request *async = NULL; 127 struct eip93_descriptor_s *rdesc; > 128 bool last_entry, complete; 129 u32 flags; 130 int handled, ready; 131 int err = 0; 132 union peCrtlStat_w done1; 133 union peLength_w done2; 134 135 get_more: 136 handled = 0; 137 138 ready = readl(mtk->base + EIP93_REG_PE_RD_COUNT) & GENMASK(10, 0); 139 140 if (!ready) { 141 mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); 142 mtk_irq_enable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); 143 return; 144 } 145 146 last_entry = false; 147 complete = false; 148 149 while (ready) { 150 rdesc = mtk_get_descriptor(mtk); 151 if (IS_ERR(rdesc)) { 152 dev_err(mtk->dev, "Ndesc: %d nreq: %d\n", 153 handled, ready); 154 err = -EIO; 155 break; 156 } 157 /* make sure DMA is finished writing */ 158 do { 159 done1.word = READ_ONCE(rdesc->peCrtlStat.word); 160 done2.word = READ_ONCE(rdesc->peLength.word); 161 } while ((!done1.bits.peReady) || (!done2.bits.peReady)); 162 163 err = rdesc->peCrtlStat.bits.errStatus; 164 165 flags = rdesc->userId; 166 async = (struct crypto_async_request *)rdesc->arc4Addr; 167 168 writel(1, mtk->base + EIP93_REG_PE_RD_COUNT); 169 mtk_irq_clear(mtk, EIP93_INT_PE_RDRTHRESH_REQ); 170 171 handled++; 172 ready--; 173 174 if (flags & MTK_DESC_LAST) { 175 last_entry = true; 176 break; 177 } 178 } 179 180 if (!last_entry) 181 goto get_more; 182 #ifdef CONFIG_CRYPTO_DEV_EIP93_SKCIPHER 183 if (flags & MTK_DESC_SKCIPHER) 184 mtk_skcipher_handle_result(mtk, async, err); 185 #endif 186 #ifdef CONFIG_CRYPTO_DEV_EIP93_AEAD 187 if (flags & MTK_DESC_AEAD) 188 mtk_aead_handle_result(mtk, async, err); 189 #endif 190 goto get_more; 191 } 192 193 static void mtk_done_task(unsigned long data) 194 { 195 struct mtk_device *mtk = (struct mtk_device *)data; 196 197 mtk_handle_result_descriptor(mtk); 198 } 199 200 static irqreturn_t mtk_irq_handler(int irq, void *dev_id) 201 { 202 struct mtk_device *mtk = (struct mtk_device *)dev_id; 203 u32 irq_status; 204 205 irq_status = readl(mtk->base + EIP93_REG_INT_MASK_STAT); 206 207 if (irq_status & EIP93_INT_PE_RDRTHRESH_REQ) { 208 mtk_irq_disable(mtk, EIP93_INT_PE_RDRTHRESH_REQ); 209 tasklet_schedule(&mtk->ring->done_task); 210 return IRQ_HANDLED; 211 } 212 213 /* TODO: error handler; for now just clear ALL */ 214 mtk_irq_clear(mtk, irq_status); 215 if (irq_status) 216 mtk_irq_disable(mtk, irq_status); 217 218 return IRQ_NONE; 219 } 220 > 221 void mtk_initialize(struct mtk_device *mtk) 222 { 223 union peConfig_w peConfig; 224 union peEndianCfg_w peEndianCfg; 225 union peIntCfg_w peIntCfg; 226 union peClockCfg_w peClockCfg; 227 union peBufThresh_w peBufThresh; 228 union peRingThresh_w peRingThresh; 229 230 /* Reset Engine and setup Mode */ 231 peConfig.word = 0; 232 peConfig.bits.resetPE = 1; 233 peConfig.bits.resetRing = 1; 234 peConfig.bits.peMode = 3; 235 peConfig.bits.enCDRupdate = 1; 236 237 writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); 238 239 udelay(10); 240 241 peConfig.bits.resetPE = 0; 242 peConfig.bits.resetRing = 0; 243 244 writel(peConfig.word, mtk->base + EIP93_REG_PE_CONFIG); 245 246 /* Initialize the BYTE_ORDER_CFG register */ 247 peEndianCfg.word = 0; 248 writel(peEndianCfg.word, mtk->base + EIP93_REG_PE_ENDIAN_CONFIG); 249 250 /* Initialize the INT_CFG register */ 251 peIntCfg.word = 0; 252 writel(peIntCfg.word, mtk->base + EIP93_REG_INT_CFG); 253 254 /* Config Clocks */ 255 peClockCfg.word = 0; 256 peClockCfg.bits.enPEclk = 1; 257 #ifdef CONFIG_CRYPTO_DEV_EIP93_DES 258 peClockCfg.bits.enDESclk = 1; 259 #endif 260 #ifdef CONFIG_CRYPTO_DEV_EIP93_AES 261 peClockCfg.bits.enAESclk = 1; 262 #endif 263 #ifdef CONFIG_CRYPTO_DEV_EIP93_HMAC 264 peClockCfg.bits.enHASHclk = 1; 265 #endif 266 writel(peClockCfg.word, mtk->base + EIP93_REG_PE_CLOCK_CTRL); 267 268 /* Config DMA thresholds */ 269 peBufThresh.word = 0; 270 peBufThresh.bits.inputBuffer = 128; 271 peBufThresh.bits.outputBuffer = 128; 272 273 writel(peBufThresh.word, mtk->base + EIP93_REG_PE_BUF_THRESH); 274 275 /* Clear/ack all interrupts before disable all */ 276 mtk_irq_clear(mtk, 0xFFFFFFFF); 277 mtk_irq_disable(mtk, 0xFFFFFFFF); 278 279 /* Config Ring Threshold */ 280 peRingThresh.word = 0; 281 peRingThresh.bits.CDRThresh = MTK_RING_SIZE - MTK_RING_BUSY; 282 peRingThresh.bits.RDRThresh = 1; 283 peRingThresh.bits.RDTimeout = 5; 284 peRingThresh.bits.enTimeout = 1; 285 286 writel(peRingThresh.word, mtk->base + EIP93_REG_PE_RING_THRESH); 287 } 288 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
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