On Fri, Feb 12, 2021 at 05:35:26PM +0100, Krzysztof Kozlowski wrote: > The driver for Slim Security Subsystem (SlimSSS) on Exynos5433 takes two > clocks - aclk (AXI/AHB clock) and pclk (APB/Advanced Peripheral Bus > clock). The "aclk", as main high speed bus clock, is enabled first. Then > the "pclk" is enabled. > > However the driver assigned reversed names for lookup of these clocks > from devicetree, so effectively the "pclk" was enabled first. > > Although it might not matter in reality, the correct order is to enable > first main/high speed bus clock - "aclk". Also this was the intention > of the actual code. > > Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx> > > --- > > Not tested, please kindly test on Exynos5433 hardware. > --- > drivers/crypto/s5p-sss.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Patch applied. Thanks. -- Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
