MAC_FAILED gets set in the status register if authenthication fails
for ccm algorithms(during decryption). Add support to catch and flag
this error.
Signed-off-by: Thara Gopinath <thara.gopinath@xxxxxxxxxx>
---
drivers/crypto/qce/common.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
index dceb9579d87a..7c3cb483749e 100644
--- a/drivers/crypto/qce/common.c
+++ b/drivers/crypto/qce/common.c
@@ -403,7 +403,8 @@ int qce_start(struct crypto_async_request *async_req, u32 type)
}
#define STATUS_ERRORS \
- (BIT(SW_ERR_SHIFT) | BIT(AXI_ERR_SHIFT) | BIT(HSD_ERR_SHIFT))
+ (BIT(SW_ERR_SHIFT) | BIT(AXI_ERR_SHIFT) | \
+ BIT(HSD_ERR_SHIFT) | BIT(MAC_FAILED_SHIFT))
int qce_check_status(struct qce_device *qce, u32 *status)
{
@@ -417,8 +418,12 @@ int qce_check_status(struct qce_device *qce, u32 *status)
* use result_status from result dump the result_status needs to be byte
* swapped, since we set the device to little endian.
*/
- if (*status & STATUS_ERRORS || !(*status & BIT(OPERATION_DONE_SHIFT)))
- ret = -ENXIO;
+ if (*status & STATUS_ERRORS || !(*status & BIT(OPERATION_DONE_SHIFT))) {
+ if (*status & BIT(MAC_FAILED_SHIFT))
+ ret = -EBADMSG;
+ else
+ ret = -ENXIO;
+ }
return ret;
}
--
2.25.1
