On 5/16/2020 7:23 AM, Andrey Smirnov wrote:
> Vyrbrid devices don't have any clock that need to be taken care of, so
> make clock data optional on i.MX.
>
Vybrid Security RM states that IPG clock used by CAAM
can be gated by CCM_CCGR11[CG176].
Clock driver needs to be updated accordingly,
and so will CAAM driver and DT node.
I don't have a board at hand, so patch below is not tested.
Horia
------ >8 ------
Subject: [PATCH] clk: imx: vf610: add CAAM clock
According to Vybrid Security RM, CCM_CCGR11[CG176] can be used to
gate CAAM ipg clock.
Signed-off-by: Horia Geantă <horia.geanta@xxxxxxx>
---
drivers/clk/imx/clk-vf610.c | 2 ++
include/dt-bindings/clock/vf610-clock.h | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
index cd04e7dc1878..4f3066cf1b89 100644
--- a/drivers/clk/imx/clk-vf610.c
+++ b/drivers/clk/imx/clk-vf610.c
@@ -439,6 +439,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
clk[VF610_CLK_DAP] = imx_clk_gate("dap", "platform_bus", CCM_CCSR, 24);
clk[VF610_CLK_OCOTP] = imx_clk_gate("ocotp", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(5));
+ clk[VF610_CLK_CAAM] = imx_clk_gate2("caam", "ipg_bus", CCM_CCGR11, CCM_CCGRx_CGn(0));
+
imx_check_clocks(clk, ARRAY_SIZE(clk));
clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]);
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h
index 95394f35a74a..0f2d60e884dc 100644
--- a/include/dt-bindings/clock/vf610-clock.h
+++ b/include/dt-bindings/clock/vf610-clock.h
@@ -195,6 +195,7 @@
#define VF610_CLK_WKPU 186
#define VF610_CLK_TCON0 187
#define VF610_CLK_TCON1 188
-#define VF610_CLK_END 189
+#define VF610_CLK_CAAM 189
+#define VF610_CLK_END 190
#endif /* __DT_BINDINGS_CLOCK_VF610_H */
--
2.17.1
