The Arm CryptoCell is a hardware security engine. This patch adds DT bindings for its TRNG (True Random Number Generator) engine. Signed-off-by: Hadar Gat <hadar.gat@xxxxxxx> --- .../devicetree/bindings/rng/arm-cctrng.yaml | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/arm-cctrng.yaml diff --git a/Documentation/devicetree/bindings/rng/arm-cctrng.yaml b/Documentation/devicetree/bindings/rng/arm-cctrng.yaml new file mode 100644 index 0000000..fe9422e --- /dev/null +++ b/Documentation/devicetree/bindings/rng/arm-cctrng.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/arm-cctrng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm ZrustZone CryptoCell TRNG engine + +maintainers: + - Hadar Gat <hadar.gat@xxxxxxx> + +description: |+ + Arm ZrustZone CryptoCell TRNG (True Random Number Generator) engine. + +properties: + compatible: + description: Should be "arm,cryptocell-7x3-trng" + const: arm,cryptocell-7x3-trng + + interrupts: + description: Interrupt number for the device. + maxItems: 1 + + reg: + description: Base physical address of the engine and length of memory + mapped region. + maxItems: 1 + + rosc-ratio: + description: Sampling ratio values from calibration for 4 ring oscillators. + maxItems: 1 + + clocks: + description: Reference to the crypto engine clock. + +required: + - compatible + - interrupts + - reg + - rosc-ratio + +additionalProperties: false + +examples: + - | + arm_cctrng: arm_cctrng@60000000 { + compatible = "arm,cryptocell-7x3-trng"; + interrupts = <0 29 4>; + reg = <0x60000000 0x10000>; + rosc-ratio = <5000 1000 500 0>; + }; -- 2.7.4
