Add clock entry needed to support i.MX8MM.
[ 1.040682] caam 30900000.crypto: Entropy delay = 3200
[ 1.045935] caam 30900000.crypto: Entropy delay = 3600
[ 1.118813] caam 30900000.crypto: Instantiated RNG4 SH0
[ 1.186476] caam 30900000.crypto: Instantiated RNG4 SH1
[ 1.191726] caam 30900000.crypto: device ID = 0x0a16040100000000 (Era 9)
[ 1.198434] caam 30900000.crypto: job rings = 3, qi = 0
[ 1.222717] caam algorithms registered in /proc/crypto
[ 1.231297] caam 30900000.crypto: caam pkc algorithms registered in /proc/crypto
Signed-off-by: Michael Trimarchi <michael@xxxxxxxxxxxxxxxxxxxx>
---
drivers/crypto/caam/ctrl.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index d7c3c3805693..ab8df3b550a7 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -99,10 +99,11 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
if (ctrlpriv->virt_en == 1 ||
/*
- * Apparently on i.MX8MQ it doesn't matter if virt_en == 1
+ * Apparently on i.MX8MQ and i.MX8MM it doesn't matter if virt_en == 1
* and the following steps should be performed regardless
*/
- of_machine_is_compatible("fsl,imx8mq")) {
+ of_machine_is_compatible("fsl,imx8mq") ||
+ of_machine_is_compatible("fsl,imx8mm")) {
clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0);
while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) &&
@@ -509,6 +510,7 @@ static const struct soc_device_attribute caam_imx_soc_table[] = {
{ .soc_id = "i.MX6*", .data = &caam_imx6_data },
{ .soc_id = "i.MX7*", .data = &caam_imx7_data },
{ .soc_id = "i.MX8MQ", .data = &caam_imx7_data },
+ { .soc_id = "i.MX8MM", .data = &caam_imx7_data },
{ .family = "Freescale i.MX" },
{ /* sentinel */ }
};
--
2.17.1
