This patchset adds support for non-Marvell hardware, probing the HW configuration directly from the HW itself instead of making assumptions based on specific Marvell instances and applying appropriate settings. This should get most EIP97/EIP197 instances out there up and running, albeit not always with optimal settings yet. Still to be done: - support for EIP197 HW with 256 bit internal bus width - optimize settings for newer versions of the HW This was tested with both the Macchiatobin board, "similar to Marvell" HW on the Xilinx VCU118 devboard and a eip197c-iesb HW3.1 on the Xilinx VCU118 devboard. Pascal van Leeuwen (6): crypto: inside-secure - Add EIP97/EIP197 and endianness detection crypto: inside-secure: Corrected configuration of EIP96_TOKEN_CTRL crypto: inside-secure - Enable extended algorithms on newer HW crypto: inside-secure - Base CD fetchcount on actual CD FIFO size crypto: inside-secure - Base RD fetchcount on actual RD FIFO size crypto: inside-secure - Probe transform record cache RAM sizes drivers/crypto/inside-secure/safexcel.c | 459 ++++++++++++++++++++++++-------- drivers/crypto/inside-secure/safexcel.h | 78 ++++-- 2 files changed, 418 insertions(+), 119 deletions(-) -- 1.8.3.1
