Hello, When you speak of "crypto engine", you mean the caam engine? In effect the "crypto engine" component already exists. About the tests, what about iMX? Regards, Franck LENORMAND STEC engineer, NXP, Sophia Antipolis, France > -----Original Message----- > From: Horia Geantă <horia.geanta@xxxxxxx> > Sent: Thursday, April 25, 2019 6:25 PM > To: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> > Cc: David S. Miller <davem@xxxxxxxxxxxxx>; Aymen Sghaier > <aymen.sghaier@xxxxxxx>; Laurentiu Tudor <laurentiu.tudor@xxxxxxx>; > Vakul Garg <vakul.garg@xxxxxxx>; Franck Lenormand > <franck.lenormand@xxxxxxx>; Iuliana Prodan <iuliana.prodan@xxxxxxx>; > Marcin Niestroj <m.niestroj@xxxxxxxxxxxxxxxx>; linux- > crypto@xxxxxxxxxxxxxxx; dl-linux-imx <linux-imx@xxxxxxx> > Subject: [PATCH 0/7] crypto: caam - IOMMU support > > This patch set adds support in caam drivers (caam/jr, caam/qi, caam/qi2) for > the crypto engine to work behind an IOMMU. > > The changes consist in: > > 1. Deferred probing support > -caam/jr - top level drivers are converted to "libraries"; this also fixes the > issue reported previously by Marcin: > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch > work.kernel.org%2Fcover%2F10558409%2F&data=02%7C01%7Cfranck.l > enormand%40nxp.com%7C8287a6a9f68b454c0c8208d6c99a99d1%7C686ea1 > d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636918063169481939&sd > ata=H0PV3%2BywroOecoXuNP4tL3TDoZ%2BZasJ0xZyo%2FjBCNlY%3D&r > eserved=0 > -caam/qi - use the newly added QBMan functions (*) to decide whether to > defer caam controller probing or not > > 2. Fixing spurios memory accesses, that lead to IOMMU access faults -crypto > engine prefetches S/G table entries in chunks of 4 (64 bytes), and driver has > to make sure memory is allocated and mapped -crypto engine tries to > prefetch S/G table entries when input / output is marked as scattered, even > though length is zero > > 3. Getting rid of platform device created by caam/qi There are inherent > problems with platform device being created dynamically (and not relying on > the existence of a DT node). > > 4. Update phys -> virt address translation in case IOMMU is present iova -> > phys -> virt > > 5. Fix the device used for key buffers DMA mapping Key buffers are > incorrectly DMA mapped using a job ring device, since they are accessed > eventually by the QI - this creating an ICID / stream ID mismatch at IOMMU > level. > > Tests were performed on: > -LS1046A - caam/jr and caam/qi - job ring and queue interface -LS1088A - > caam/jr and caam/qi2 - job ring and dpsec interface > > There are some dependencies (see below). > While not everything is in place, I would like at least to patches 1-8/9 being > reviewed & merged. > > i. Patch 9/9 (crypto: caam - defer probing until QMan is available) should > NOT be merged, since there are compilation dependencies on the patch > series: > (*) Prerequisites for NXP LS104xA SMMU enablement > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch > work.kernel.org%2Fproject%2Flinux-arm- > kernel%2Flist%2F%3Fseries%3D98625&data=02%7C01%7Cfranck.lenor > mand%40nxp.com%7C8287a6a9f68b454c0c8208d6c99a99d1%7C686ea1d3bc > 2b4c6fa92cd99c5c301635%7C0%7C0%7C636918063169481939&sdata=r > 78Ha5IE9DFlLbqIbYYDhUqFyY2%2FUJ9pdxJ3p47Jymg%3D&reserved=0 > > ii. U-boot updates for LS1088A (needed for caam/jr ICID programming) [U- > Boot,1/2] armv8: fsl-layerscape: add missing sec jr base address defines > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch > work.ozlabs.org%2Fpatch%2F1059256%2F&data=02%7C01%7Cfranck.le > normand%40nxp.com%7C8287a6a9f68b454c0c8208d6c99a99d1%7C686ea1d > 3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636918063169481939&sdat > a=Yy3kPY41iTX%2FJHC1fJ51PrXCLHKaq%2BXm0TyxOxcQ1Zw%3D&reser > ved=0 > [U-Boot,2/2] armv8: ls1088a: add icid setup for platform devices > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch > work.ozlabs.org%2Fpatch%2F1059259%2F&data=02%7C01%7Cfranck.le > normand%40nxp.com%7C8287a6a9f68b454c0c8208d6c99a99d1%7C686ea1d > 3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636918063169491948&sdat > a=ajYD5M1mhAur3F0vYLOHi2CGwC1ItcMUsWSWD5ZrQGU%3D&reserv > ed=0 > > Horia Geantă (7): > crypto: caam - avoid S/G table fetching for AEAD zero-length output > crypto: caam - fix S/G table passing page boundary > crypto: caam - convert top level drivers to libraries > crypto: caam/qi - don't allocate an extra platform device > crypto: caam/qi - fix address translations with IOMMU enabled > crypto: caam/qi - DMA map keys using proper device > crypto: caam - defer probing until QMan is available > > drivers/crypto/caam/Kconfig | 46 ++++------- > drivers/crypto/caam/Makefile | 18 ++--- > drivers/crypto/caam/caamalg.c | 72 ++++++++--------- > drivers/crypto/caam/caamalg_qi.c | 124 +++++++++++++++--------------- > drivers/crypto/caam/caamalg_qi2.c | 72 +++++++++++++---- > drivers/crypto/caam/caamhash.c | 81 ++++++------------- > drivers/crypto/caam/caampkc.c | 57 +++----------- > drivers/crypto/caam/caamrng.c | 54 ++----------- > drivers/crypto/caam/ctrl.c | 124 ++++++++++++++++++------------ > drivers/crypto/caam/desc_constr.h | 11 +++ > drivers/crypto/caam/intern.h | 102 ++++++++++++++++++++++-- > drivers/crypto/caam/jr.c | 43 +++++++++++ > drivers/crypto/caam/qi.c | 52 ++++++------- > 13 files changed, 465 insertions(+), 391 deletions(-) > > -- > 2.17.1
