Hi Horia, On Mon, 4 Mar 2019 at 18:13, Horia Geanta <horia.geanta@xxxxxxx> wrote: > > I don't have the i.MX8 security reference manual so there's only so > RM should be available from here: > https://www.nxp.com/webapp/sps/download/mod_download.jsp?colCode=IMX8MDQLQSRM&location=null&appType=moderated Unfortunately this requires an NXP Salesperson/FAE Name and FAE Email Address, which I don't have. I did put in a request on Thursday via the live chat, but so far nobody from sales has contacted me. > > much analysis I can do, but it seems that virtualisation is enabled in > > hardware without the registers reflecting that appropriately. If I > > patch the TF-A to set SCFGR_VIRT_EN = 1 in the same place it sets > > CAAM_JRxMID = 1 then everything seems to work, but I've got no idea if > > that is an appropriate change to make. > > > RNG initialization should work in both cases. > > The root cause for the failure in case virtualization is disabled is probably > the lack of setup of DECO DID registers (offsets A0h, A4h). > > Section "Register-based service interface" mentions: > "But before requesting a DECO, software must specify the DID and SDID values > that will be used when executing descriptors under direct software control. When > virtualization is disabled (SCFGR[VIRT_EN]=0), these values are specified by > writing DID and SDID values into the appropriate DECO DID_MS and DECO DID_LS > registers." Not having much luck here either. In the TF-A it sets JRxMID to 1; I have added extra lines in the same place to set DECO0MID_MS (0x309000a0) to 1 and DECO0MID_LS (0x309000a4) to 0x10001, but it still fails to acquire the DECO when initialising the RNG. It's possible I'm just using the wrong values. I'm still working from the i.MX6 security reference manual which doesn't seem to talk about DIDs or SDIDs so I don't know what these mean. Thanks, Chris
