On 27 August 2018 at 16:53, Theodore Y. Ts'o <tytso@xxxxxxx> wrote: > On Mon, Aug 27, 2018 at 01:02:41PM +0200, Ard Biesheuvel wrote: >> While this is not known to cause performance issues, calling a table based >> time variant implementation with a non-negligible D-cache footprint (8 KB) >> is wasteful in any case, and now that the crc32 instructions have been made >> mandatory in the architecture, let's wire them up into the core crc routines. > > Stupid question --- are there any arm64 SOC's out there which do *not* > have the crc32 instructions? Presumably there won't be in the future, > because it's now mandatory --- but where there any in the past? > Yes, the APM Xgene for instance.
