On Fri, Sep 15, 2017 at 07:34:31AM +0200, Ingo Molnar wrote: > > * Eric Biggers <ebiggers3@xxxxxxxxx> wrote: > > > Hi Josh, > > > > On Wed, Sep 13, 2017 at 05:33:03PM -0500, Josh Poimboeuf wrote: > > > And here's v2 of the sha512-avx2 patch. It should hopefully gain back > > > most of the performance lost by v1. > > > > > > From: Josh Poimboeuf <jpoimboe@xxxxxxxxxx> > > > Subject: [PATCH] x86/crypto: Fix RBP usage in sha512-avx2-asm.S > > > > > > Using RBP as a temporary register breaks frame pointer convention and > > > breaks stack traces when unwinding from an interrupt in the crypto code. > > > > > > Mix things up a little bit to get rid of the RBP usage, without > > > destroying performance. Use RDI instead of RBP for the TBL pointer. > > > That will clobber CTX, so save CTX on the stack and use RDI as CTX > > > before it gets clobbered, and R12 as CTX after it gets clobbered. > > > > > > Also remove the unused y4 variable. > > > > > > > I tested the v2 patches for both sha256-avx2 and sha512-avx2 on Skylake. They > > both pass the crypto self-tests, and there was no noticable performance > > difference compared to the unpatched versions. Thanks! > > Cool, thanks for review and the testing! Can we add your Tested-by + Acked-by tags > to the patches? > Yes, that's fine for all the patches in the series. Will these patches go in through the crypto tree or through the x86 tree? Eric
