Re: [PATCH 05/13] crypto: caam/qi - handle large number of S/Gs case

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On 7/7/2017 4:06 PM, Horia Geantă wrote:
> For more than 16 S/G entries, driver currently corrupts memory
> on ARMv8, see below KASAN log.
> Note: this does not reproduce on PowerPC due to different (smaller)
> cache line size - 64 bytes on PPC vs. 128 bytes on ARMv8.
> 
> One such use case is one of the cbc(aes) test vectors - with 8 S/G
> entries and src != dst. Driver needs 1 (IV) + 2 x 8 = 17 entries,
> which goes over the 16 S/G entries limit:
> (CAAM_QI_MEMCACHE_SIZE - offsetof(struct ablkcipher_edesc, sgt)) /
> sizeof(struct qm_sg_entry) = 256 / 16 = 16 S/Gs
> 
> Fix this by:
> -increasing object size in caamqicache pool from 512 to 768; this means
> the maximum number of S/G entries grows from (at least) 16 to 32
> (again, for ARMv8 case of 128-byte cache line)
> -add checks in the driver to fail gracefully (ENOMEM) in case the 32 S/G
> entries limit is exceeded

Looks like I forgot to add a check in one of the places -
ablkcipher_giv_edesc_alloc(). Will fix this in v2.

Horia




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