Hi Jyri, Thanks for the ack. However, I'm reworking this patch set to use the include/linux/io-64-nonatomic* headers which will explicitly devolve into two 32-bit transfers. It's not clear whether this is appropriate for the tilcdc driver as it was never setup to use 32-bit transfers (unlike the others I had patched). If you think it's ok, I can still patch this driver to use the non-atomic headers. Otherwise I can leave it out. Please let me know. Thanks, Logan On 26/06/17 02:55 AM, Jyri Sarha wrote: > Acked-by: Jyri Sarha <jsarha@xxxxxx> > > And thanks! > >> --- >> drivers/gpu/drm/tilcdc/tilcdc_regs.h | 6 ------ >> 1 file changed, 6 deletions(-) >> >> diff --git a/drivers/gpu/drm/tilcdc/tilcdc_regs.h b/drivers/gpu/drm/tilcdc/tilcdc_regs.h >> index e9ce725698a9..0b901405f30a 100644 >> --- a/drivers/gpu/drm/tilcdc/tilcdc_regs.h >> +++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h >> @@ -133,13 +133,7 @@ static inline void tilcdc_write64(struct drm_device *dev, u32 reg, u64 data) >> struct tilcdc_drm_private *priv = dev->dev_private; >> void __iomem *addr = priv->mmio + reg; >> >> -#ifdef iowrite64 >> iowrite64(data, addr); >> -#else >> - __iowmb(); >> - /* This compiles to strd (=64-bit write) on ARM7 */ >> - *(u64 __force *)addr = __cpu_to_le64(data); >> -#endif >> } >> >> static inline u32 tilcdc_read(struct drm_device *dev, u32 reg) >> >
