On Mon, May 22, 2017 at 03:48:30PM +0100, Marc Zyngier wrote:
> On 22/05/17 15:30, Antoine Tenart wrote:
> > On Wed, May 03, 2017 at 05:36:38PM +0100, Marc Zyngier wrote:
> >> On 24/04/17 08:54, Antoine Tenart wrote:
> >>> +
> >>> + crypto: crypto@800000 {
> >>> + compatible = "inside-secure,safexcel-eip197";
> >>> + reg = <0x800000 0x200000>;
> >>> + interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)>,
> >>
> >> I'm puzzled. How can the interrupt can be both level *and* edge? That
> >> doesn't make any sense.
> >
> > I agree this looks odd. I took it from Russel's ICU mapping:
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2017-February/489040.html
>
> This emails says:
>
> ICU-irq => GIC-SPI-num Enable Edge/Level ICU-group
> [...]
> 24 => 34 En Lv 0
It also says: 87 => 34 En Lv 5, which is the IRQ I'm looking for.
Antoine.
--
Antoine Ténart, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
