> There are SoCs like LS1043A where CAAM endianness (BE) does not match
> the default endianness of the core (LE).
> Moreover, there are requirements for the driver to handle cases like
> CPU_BIG_ENDIAN=y on ARM-based SoCs.
> This requires for a complete rewrite of the I/O accessors.
>
> PPC-specific accessors - {in,out}_{le,be}XX - are replaced with
> generic ones - io{read,write}[be]XX.
>
> Endianness is detected dynamically (at runtime) to allow for
> multiplatform kernels, for e.g. running the same kernel image
> on LS1043A (BE CAAM) and LS2080A (LE CAAM) armv8-based SoCs.
>
> While here: debugfs entries need to take into consideration the
> endianness of the core when displaying data. Add the necessary
> glue code so the entries remain the same, but they are properly
> read, regardless of the core and/or SEC endianness.
>
> Note: pdb.h fixes only what is currently being used (IPsec).
>
> Signed-off-by: Horia Geantă <horia.geanta@xxxxxxx>
> Signed-off-by: Alex Porosanu <alexandru.porosanu@xxxxxxx>
> ---
> drivers/crypto/caam/Kconfig | 4 -
> drivers/crypto/caam/caamhash.c | 5 +-
> drivers/crypto/caam/ctrl.c | 125 +++++++++++++++++++------------
> drivers/crypto/caam/desc.h | 7 +-
> drivers/crypto/caam/desc_constr.h | 44 +++++++----
> drivers/crypto/caam/jr.c | 22 +++---
> drivers/crypto/caam/pdb.h | 137 ++++++++++++++++++++++++++--------
> drivers/crypto/caam/regs.h | 151 +++++++++++++++++++++++++---------
> ----
> drivers/crypto/caam/sg_sw_sec4.h | 11 +--
> 9 files changed, 340 insertions(+), 166 deletions(-)
Reviewed-by: Tudor Ambarus <tudor-dan.ambarus@xxxxxxx>
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