Re: [PATCH] nx-842: Ignore bit 3 of condition register returned by icswx

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On Fri, Oct 30, 2015 at 6:43 PM, Ram Pai <linuxram@xxxxxxxxxx> wrote:
> icswx occasionally under heavy load sets bit 3 of condition register 0.
> It has no software implication.
>
> Currently that bit is interpreted by the driver as a failure, when
> it should have calmly ignored it.
>
> Signed-off-by: Ram Pai <linuxram@xxxxxxxxxx>

Acked-by: Dan Streetman <ddstreet@xxxxxxxx>

> ---
>  arch/powerpc/include/asm/icswx.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h
> index 9f8402b..bce20c7 100644
> --- a/arch/powerpc/include/asm/icswx.h
> +++ b/arch/powerpc/include/asm/icswx.h
> @@ -177,7 +177,7 @@ static inline int icswx(__be32 ccw, struct coprocessor_request_block *crb)
>         : "r" (ccw_reg), "r" (crb)
>         : "cr0", "memory");
>
> -       return (int)((cr >> 28) & 0xf);
> +       return (int)((cr >> 28) & 0xe);
>  }
>
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