On Fri, Aug 21, 2015 at 06:53:20PM +0300, Horia Geantă wrote: > Most significant part of JQCR (Job Queue Control Register) contains > bits that control endianness: ILE - Immediate Little Endian, > DWS - Double Word Swap. > The bits are automatically set by the Job Queue Controller HW. > > Unfortunately these bits are cleared in SW when submitting descriptors > via the register-based service interface. > >From LS1021A: > JQCR_MS = 08080100 - before writing: ILE | DWS | SRC (JR0) > JQCR_MS = 30000100 - after writing: WHL | FOUR | SRC (JR0) > > This would cause problems on little endian caam for descriptors > containing immediata data or double-word pointers. > Currently there is no problem since the only descriptors ran through > this interface are the ones that (un)instantiate RNG. > > Signed-off-by: Horia Geantă <horia.geanta@xxxxxxxxxxxxx> Applied. -- Email: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
