On Wed, Aug 15, 2012 at 11:42:16AM +0300, Jussi Kivilinna wrote: > I started thinking about the performance on AMD Bulldozer. > vmovq/vmovd/vpextr*/vpinsr* between FPU and general purpose registers > on AMD CPU is alot slower (latencies from 8 to 12 cycles) than on > Intel sandy-bridge (where instructions have latency of 1 to 2). See: > http://www.agner.org/optimize/instruction_tables.pdf > > It would be really good, if implementation could be tested on AMD CPU > to determinate, if it causes performance regression. However I don't > have access to machine with such CPU. But I do. :) And if you tell me exactly how to run the tests and on what kernel, I'll try to do so. HTH. -- Regards/Gruss, Boris. -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
