Quoting Randy Dunlap <rdunlap@xxxxxxxxxxxx>:
On 07/02/2012 12:23 AM, Stephen Rothwell wrote:
Hi all,
Changes since 20120629:
on i386:
ERROR: "__divdi3" [drivers/crypto/hifn_795x.ko] undefined!
This is caused by commit feb7b7ab928afa97a79a9c424e4e0691f49d63be.
hifn_795x has "DIV_ROUND_UP(NSEC_PER_SEC, dev->pk_clk_freq)", which
should be changed to DIV_ROUND_UP_ULL now that NSEC_PER_SEC is 64bit
on 32bit archs. Patch to fix hifn_795x is attached (only compile
tested).
-Jussi
crypto: hifn_795x - fix 64bit division and undefined __divdi3 on 32bit archs
From: Jussi Kivilinna <jussi.kivilinna@xxxxxxxx>
Commit feb7b7ab928afa97a79a9c424e4e0691f49d63be changed NSEC_PER_SEC to 64-bit
constant, which causes "DIV_ROUND_UP(NSEC_PER_SEC, dev->pk_clk_freq)" to
generate __divdi3 call on 32-bit archs. Fix this by changing DIV_ROUND_UP to
DIV_ROUND_UP_ULL.
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@xxxxxxxx>
---
drivers/crypto/hifn_795x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index c9c4bef..df14358 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -821,8 +821,8 @@ static int hifn_register_rng(struct hifn_device *dev)
/*
* We must wait at least 256 Pk_clk cycles between two reads of the rng.
*/
- dev->rng_wait_time = DIV_ROUND_UP(NSEC_PER_SEC, dev->pk_clk_freq) *
- 256;
+ dev->rng_wait_time = DIV_ROUND_UP_ULL(NSEC_PER_SEC,
+ dev->pk_clk_freq) * 256;
dev->rng.name = dev->name;
dev->rng.data_present = hifn_rng_data_present,
